23LCV1024-ISLASHST datasheet(10/29 Pages) MICROCHIP

Part #	23LCV1024-I/ST

Description	1 Mbit SPI Serial SRAM with Battery Backup and SDI Interface

PDF	29 Pages

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Manufacturer	MICROCHIP [Microchip Technology]

Direct Link	http://www.microchip.com

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10 / 29 page

23LCV1024

DS20005156B-page 10

 2012-2021 Microchip Technology Inc.

2.5

Read Mode Register Instruction

(RDMR)

The Read Mode Register instruction (RDMR) provides

access to the MODE register. The MODE register may

be read at any time. The MODE register is formatted as

follows:

The mode bits indicate the operating mode of the

SRAM. The possible modes of operation are:

0 0 = Byte mode

1 0 = Page mode

0 1 = Sequential mode (default operation)

1 1 = Reserved

Bits 0 through 5 are reserved and should always be set

to ‘0’.

See Figure 2-7 for the RDMR timing sequence.

FIGURE 2-7:

READ MODE REGISTER TIMING SEQUENCE (RDMR)

TABLE 2-2:

MODE REGISTER

W/R

–

MODE MODE

Note 1: W/R = writable/readable

1011

12131415

Instruction

Data from MODE Register

High-Impedance

SCK

234

567

23LCV1024-I/ST Datasheet(PDF) 10 Page - Microchip Technology