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UPSD3422EB40U6 Datasheet(PDF) 265 Page - STMicroelectronics |
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UPSD3422EB40U6 Datasheet(HTML) 265 Page - STMicroelectronics |
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265 / 300 page ![]() Obsolete Product(s) - Obsolete Product(s) Obsolete Product(s) - Obsolete Product(s) UPSD3422, UPSD3433, UPSD3434, UPSD3454 AC/DC parameters 265/300 29 AC/DC parameters These tables describe the AD and DC parameters of the UPSD34xx devices: ● DC electrical specification ● AC timing specification ● PLD timing – Combinatorial timing – Synchronous clock mode – Asynchronous clock mode – Input macrocell timing ● MCU module timing – READ timing –WRITE timing – Power-down and RESET timing The following are issues concerning the parameters presented: ● In the DC specification the supply current is given for different modes of operation. ● The AC power component gives the PLD, Flash memory, and SRAM mA/MHz specification. Figure 95 and Figure 96 show the PLD mA/MHz as a function of the number of Product Terms (PT) used. ● In the PLD timing parameters, add the required delay when Turbo Bit is '0.' Figure 95. PLD ICC / frequency consumption (5 V range) 0 10 20 30 40 60 70 80 90 100 110 VCC = 5V 50 010 15 5 20 25 HIGHEST COMPOSITE FREQUENCY AT PLD INPUTS (MHz) TURBO ON (100%) TURBO ON (25%) TURBO OFF PT 100% PT 25% AI02894 Obsolete Product(s) - Obsolete Product(s) |
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