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VNQ7003SY Datasheet(PDF) 28 Page - STMicroelectronics |
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VNQ7003SY Datasheet(HTML) 28 Page - STMicroelectronics |
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28 / 102 page ![]() SPI functional description VNQ7003SY 28/102 DS11059 Rev 8 Figure 9. Bus master and two devices in a normal configuration 4.2 SPI protocol 4.2.1 SDI format SDI, Frame 16-bit SDI format during each communication frame starts with a command byte. It begins with two bits of operating code (OC0, OC1) which specify the type of operation (read, write, read and clear status, read device information) and it is followed by a 6 bit address (A0:A5). The command byte is followed by an input data byte (D0:D7). SDI, Frame 8 bit SPI Data-In Frame length 8 bits is defined for the device requiring fast write access to single 8 bit register, called SOCR address 0x07h. SDI Frame consists of Input Data Byte content only, no Operation Code + Address is transmitted. Table 12. Command byte MSB LSB OC1 OC0 A5 A4 A3 A2 A1 A0 Table 13. Input data byte MSB LSB D7 D6 D5 D4 D3 D2 D1 D0 |
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