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V4082V2ST3B Datasheet(PDF) 2 Page - EM Microelectronic - MARIN SA

Part # V4082V2ST3B
Description  Identification ROM
PDF  7 Pages
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Manufacturer  EMMICRO [EM Microelectronic - MARIN SA]
Direct Link  http://www.emmicroelectronic.com
Logo EMMICRO - EM Microelectronic - MARIN SA

V4082V2ST3B Datasheet(HTML) 2 Page - EM Microelectronic - MARIN SA

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V4082
Copyright
© 2004, EM Microelectronic-Marin SA
2
www.emmicroelectronic.com
Absolute Maximum Ratings
Parameter
Symbol
Conditions
Voltage on Data Pin vs VSS
VDATA
-0.5 to 7.0V
Max. injected current into
DATA pin
Idata
-20 to +20 mA
Storage Temperature
TSTD
-55 to +125 °C
Power Dissipation
Pw
10 mW
Table 1
Stresses above these listed maximum ratings may cause
permanent damages to the device. Exposure beyond
specified operating conditions may affect device reliability
or cause malfunction.
Handling Procedures
This device has built-in protection against high static
voltages or electric fields; however, anti-static precautions
must be taken as for any other CMOS component. Unless
otherwise specified, proper operation can only occur when
all terminal voltages are kept within the voltage range.
Unused inputs must always be tied to a defined logic
voltage level.
Operating Conditions
Parameter
Symbol Min Typ Max Unit
External pull up voltage
VCC
4.5 5.0 5.5
V
External pull up resistance
RPUP
5
kΩ
External capacitance
Cext
800 pF
Operating temperature
TA
-40 25 +85 °C
Table 2
Electrical Characteristics
Unless otherwise specified: All voltages are referenced to VSS, VDD= 5.0V, TA=-40 to +85°C.
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
DC Characteristics
Data Input Logic Low
Data Input Logic High
Sink Current
Output Logic Low
Output Logic High
Input Resistance
Operating Charge (after
supply diode)
Current consumption
VIL
VIH
IL
VOL
VOH
RIN
COP
Idata
VOUT = 0.4V
I = 4mA
Modulator FET off
Modulator FET on, 72 time slots
Modulator FET off
-0.2
2.2
4.0
1.2
0.4
VCC
0.4
VCC*
30
16
V
V
mA
V
V
MΩ
nC
μA
* Depends on resistive divider RIN / (RPUP+RIN)
Table 3
Timing Characteristics
Unless otherwise specified: VDD= 5.0V ±10%, TA=-40 to +85°C
cf. remarks under "Effect of Cext"
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Time Slot Period
TSLOT
60
120
μs
Write 1 Low Time
TLOW1
1
15
μs
Write 0 Low Time
TLOW0
60
120
μs
Read Data Valid
TRDV
15
μs
Read Data Setup
TSU
1
μs
Frame Sync
TSYC
1
μs
Reset Low Time
TRSTL
480
μs
Reset High Time
TRSTH
480
μs
Presence Detect High
TPDH
5
50
μs
Presence Detect Low
TPDL
60
240
μs
Table 4



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