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PIC16F15213 Datasheet(PDF) 95 Page - Microchip Technology |
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PIC16F15213 Datasheet(HTML) 95 Page - Microchip Technology |
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95 / 439 page  12.9.4 PIE2 Name: PIE2 Offset: 0x718 Peripheral Interrupt Enable Register 2 Bit 7 6 5 4 3 2 1 0 CCP2IE NVMIE TMR1GIE Access R/W R/W R/W Reset 0 0 0 Bit 7 – CCP2IE CCP2 Interrupt Enable Value Description 1 CCP2 interrupts are enabled 0 CCP2 interrupts are disabled Bit 6 – NVMIE NVM Interrupt Enable Value Description 1 NVM interrupts are enabled 0 NVM interrupts are disabled Bit 5 – TMR1GIE TMR1 Gate Interrupt Enable Value Description 1 TMR1 Gate interrupts are enabled 0 TMR1 Gate interrupts are disabled Note: Bit PEIE of the INTCON register must be set to enable any peripheral interrupt controlled by PIE1 and PIE2 registers. PIC16F15213/14/23/24/43/44 Interrupts © 2020-2022 Microchip Technology Inc. and its subsidiaries Data Sheet DS40002195E-page 95 |
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