LIS2DUX12 datasheet(54/102 Pages) STMICROELECTRONICS

54 / 102 page

8.36

FSM_STATUS_MAINPAGE (35h)

Table 92. FSM_STATUS_MAINPAGE register

IS_FSM8

IS_FSM7

IS_FSM6

IS_FSM5

IS_FSM4

IS_FSM3

IS_FSM2

IS_FSM1

Table 93. FSM_STATUS_MAINPAGE register description

IS_FSM8

Interrupt status bit for FSM8 interrupt event. (1: interrupt detected; 0: no interrupt)

IS_FSM7

Interrupt status bit for FSM7 interrupt event. (1: interrupt detected; 0: no interrupt)

IS_FSM6

Interrupt status bit for FSM6 interrupt event. (1: interrupt detected; 0: no interrupt)

IS_FSM5

Interrupt status bit for FSM5 interrupt event. (1: interrupt detected; 0: no interrupt)

IS_FSM4

Interrupt status bit for FSM4 interrupt event. (1: interrupt detected; 0: no interrupt)

IS_FSM3

Interrupt status bit for FSM3 interrupt event. (1: interrupt detected; 0: no interrupt)

IS_FSM2

Interrupt status bit for FSM2 interrupt event. (1: interrupt detected; 0: no interrupt)

IS_FSM1

Interrupt status bit for FSM1 interrupt event. (1: interrupt detected; 0: no interrupt)

8.37

MLC_STATUS_MAINPAGE (36h)

Table 94. MLC_STATUS_MAINPAGE register

IS_MLC4

IS_MLC3

IS_MLC2

IS_MLC1

Table 95. MLC_STATUS_MAINPAGE register description

IS_MLC4

Interrupt status bit for MLC4 interrupt event. (1: interrupt detected; 0: no interrupt)

IS_MLC3

Interrupt status bit for MLC3 interrupt event. (1: interrupt detected; 0: no interrupt)

IS_MLC2

Interrupt status bit for MLC2 interrupt event. (1: interrupt detected; 0: no interrupt)

IS_MLC1

Interrupt status bit for MLC1 interrupt event. (1: interrupt detected; 0: no interrupt)

8.38

SLEEP (3Dh)

R/W

Table 96. SLEEP register

DEEP_PD

Table 97. SLEEP register description

DEEP_PD

If this bit is set to 1, the device enters deep a power-down state. Once the device is in a deep power-down state,

the register is no longer accessible.

LIS2DUX12

FSM_STATUS_MAINPAGE (35h)

DS14071 - Rev 2

page 54/102

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