EDB8132B4PB-8D-F-R datasheet(4/146 Pages) MICRON

4 / 146 page

Truth Tables ................................................................................................................................................... 87

Absolute Maximum Ratings ............................................................................................................................ 95

Input/Output Capacitance .............................................................................................................................. 96

Electrical Specifications – IDD Specifications and Conditions ............................................................................ 97

AC and DC Operating Conditions ................................................................................................................... 100

AC and DC Logic Input Measurement Levels for Single-Ended Signals ............................................................. 101

VREF Tolerances ......................................................................................................................................... 102

Input Signal .............................................................................................................................................. 104

AC and DC Logic Input Measurement Levels for Differential Signals ................................................................ 106

Single-Ended Requirements for Differential Signals .................................................................................... 107

Differential Input Crosspoint Voltage ......................................................................................................... 109

Input Slew Rate ......................................................................................................................................... 110

Output Characteristics and Operating Conditions ........................................................................................... 110

Single-Ended Output Slew Rate .................................................................................................................. 111

Differential Output Slew Rate ..................................................................................................................... 112

HSUL_12 Driver Output Timing Reference Load ......................................................................................... 114

Output Driver Impedance .............................................................................................................................. 115

Output Driver Impedance Characteristics with ZQ Calibration .................................................................... 116

Output Driver Temperature and Voltage Sensitivity ..................................................................................... 117

Output Impedance Characteristics Without ZQ Calibration ......................................................................... 117

Clock Specification ........................................................................................................................................ 120

tCK(abs), tCH(abs), and tCL(abs) ................................................................................................................ 122

Clock Period Jitter .......................................................................................................................................... 122

Clock Period Jitter Effects on Core Timing Parameters ................................................................................. 122

Cycle Time Derating for Core Timing Parameters ........................................................................................ 123

Clock Cycle Derating for Core Timing Parameters ....................................................................................... 123

Clock Jitter Effects on Command/Address Timing Parameters ..................................................................... 123

Clock Jitter Effects on READ Timing Parameters .......................................................................................... 123

Clock Jitter Effects on WRITE Timing Parameters ........................................................................................ 124

Refresh Requirements Parameters .................................................................................................................. 125

AC Timing ..................................................................................................................................................... 125

CA and CS_n Setup, Hold, and Derating .......................................................................................................... 131

Data Setup, Hold, and Slew Rate Derating ....................................................................................................... 139

Revision History ............................................................................................................................................ 146

Rev. C – 1/16 .............................................................................................................................................. 146

Rev. B – 7/14 .............................................................................................................................................. 146

Rev. A – 4/14 .............................................................................................................................................. 146

Embedded LPDDR2 SDRAM

Features

PDF: 09005aef85a1f01d

168b_2e0e_embedded_lpddr2_sdram.pdf – Rev. C 1/16 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

EDB8132B4PB-8D-F-R Datasheet(PDF) 4 Page - Micron Technology

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