NOVEMBER 14, 2018

13

6-OUTPUT VERY LOW-POWER PCIE GEN1–4 CLOCK GENERATOR WITH ZO=100Ω

6P41282 DATASHEET

Package Outline Drawings

The package outline drawings are located at the end of this document and accessible from the link below. The package

information is the most current data available.

www.renesas.com/us/en/document/psc/package-outline-drawing-package-code-ndg40p2-40-vfqfpn-50-x-50-x-09-mm-body-04

-mm-pitch

Ordering Information

“G” suffix to the part number are the Pb-Free configuration and are RoHS compliant.

Revision History

Part / Order Number Shipping Packaging

Package

Temperature

6P41282NDG

Trays

40-pin VFQFPN

0 to +70° C

6P41282NDG8

Tape and Reel

40-pin VFQFPN

0 to +70° C

Issue Date

Description

11/14/2018

Initial release.