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74LVC4245APW Datasheet(PDF) 8 Page - NXP Semiconductors |
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74LVC4245APW Datasheet(HTML) 8 Page - NXP Semiconductors |
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8 / 16 page ![]() 1999 Jun 15 8 Philips Semiconductors Product specification Octal dual supply translating transceiver; 3-state 74LVC4245A Fig.6 The 3-state enable and disable times. handbook, full pagewidth MNA367 tPLZ tPHZ outputs disabled outputs enabled VY VX outputs enabled OUTPUT LOW-to-OFF OFF-to-LOW OUTPUT HIGH-to-OFF OFF-to-HIGH OE INPUT VI VOL VOH VCC VM GND GND tPZL tPZH VM VM VM = 1.5 V at 2.7 V ≤ VCCB ≤ 3.6 V; VM = 0.5VCCA at VCCA ≥ 4.5 V; VX =VOL +0.3VatVCCB ≤ 3.6 V; VX =VOL + 0.1 (VCCA − VOL)atVCCA ≥ 4.5 V VY =VOH − 0.3VatVCCB ≤ 3.6 V; VY =VOH − 0.1 (VOH − GND) at VCCA ≥ 4.5 V; VOL and VOH are typical output voltage drop that occur with the output load. Fig.7 Load circuitry for switching times. Definitions for test circuit: RL = Load resistor; see chapter “AC characteristics”. CL = Load capacitance including jig and probe capacitance (see chapter “AC characteristics”). RT = Termination resistance should be equal to the output impedance Z0 of the pulse generator. TEST S1 tPLH/tPHL open tPLZ/tPZL 2 × VCC tPHZ/tPZH GND VCC VI for A and B port <2.7 V VCC for B port 2.7 to 3.6 V 2.7 V for A port 4.5 to 5.5 V 3.0 V handbook, full pagewidth open GND 50 pF 2 × VCC VCC VI VO MNA368 D.U.T. CL RT RL 500 Ω RL 500 Ω PULSE GENERATOR S1 |
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