VSC8530-05 datasheet(78/80 Pages) MICROSEMI

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Design Considerations

VMDS-10516 VSC8530-05 Datasheet Revision 4.1

Design Considerations

This section provides information about design considerations for the VSC8530-05 device.

8.1

10BASE-T signal amplitude

10BASE-T signal amplitude can be lower than the minimum specified in IEEE 802.3 paragraph

14.3.1.2.1 (2.2 V) at low supply voltages. Additionally, associated templates may be marginal or have

failures.

This issue is not estimated to present any system-level impact. Performance is not impaired with cables

up to 130 m with various link partners.

8.2

Receive error counter only clears when NRESET applied

in RMII mode

When operating in RMII MAC interface mode, the receive error counter of register 19 (Table 32, page 31)

does not clear upon read-back or software reset of the device. The only way to clear this register while in

RMII mode is to assert the NRESET pin of the device.

The receive error counter at register address 19 operates normally in MAC interface modes other than

RMII.

8.3

Anomalous PCS error indications in Energy Efficient

Ethernet mode

When a port is processing traffic with EEE enabled on the link, certain PCS errors (such as false carriers,

spurious start-of-stream detection, and idle errors) and EEE wake errors may occur. There is no effect on

traffic bit error rate for cable lengths up to 75 meters, and minor packet loss may occur on links longer

than 75 meters.

Regardless of cable length, some error indications should not be used while EEE is enabled. These error

indications include false carrier interrupts (Interrupt Status, page 35, bit 3), receive error interrupts

(Interrupt Status, page 35, bit 0), and EEE wake error interrupts.

Contact Microsemi for a script that needs to be applied during system initialization if EEE will be enabled.

VSC8530-05 Datasheet(PDF) 78 Page - Microsemi Corporation