 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
9LPRS471C Datasheet(PDF) 13 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
9LPRS471C Datasheet(HTML) 13 Page - Renesas Technology Corp |
|
|
13 / 23 page  IDT® Programmable System Clock Chip for ATI RS790 - K8TM based Systems 1398—05/23/12 9LPRS471C Frequency Timing Generator for Peripherals 13 Advance Information SMBUS Table: CPU Output Divider Register Byte 20 Name Control Function Type 0 1 Default Bit 7 CPU NDiv0 LSB N Divider Programming RW X Bit 6 X Bit 5 X Bit 4 X Bit 3 CPUDiv3 RW 0000:/2 ; 0100:/4 1000:/8 ; 1100:/16 X Bit 2 CPUDiv2 RW 0001:/3 ; 0101:/6 1001:/12 ; 1101:/24 X Bit 1 CPUDiv1 RW 0010:/5 ; 0110:/10 1010:/20 ; 1110:/40 X Bit 0 CPUDiv0 RW 0011:/9 ; 0111:/18 1011:/36 ; 1111:/72 X SMBUS Table: SRC Frequency Control Register Byte 21 Name Control Function Type 0 1 Default Bit 7 N Div2 N Divider Prog bit 2 RW X Bit 6 N Div1 N Divider Prog bit 1 RW X Bit 5 M Div5 RW X Bit 4 M Div4 RW X Bit 3 M Div3 RW X Bit 2 M Div2 RW X Bit 1 M Div1 RW X Bit 0 M Div0 RW X SMBUS Table: SRC Frequency Control Register Byte 22 Name Control Function Type 0 1 Default Bit 7 N Div10 RW X Bit 6 N Div9 RW X Bit 5 N Div8 RW X Bit 4 N Div7 RW X Bit 3 N Div6 RW X Bit 2 N Div5 RW X Bit 1 N Div4 RW X Bit 0 N Div3 RW X SMBUS Table: SRC Spread Spectrum Control Register Byte 23 Name Control Function Type 0 1 Default Bit 7 SSP7 RW X Bit 6 SSP6 RW X Bit 5 SSP5 RW X Bit 4 SSP4 RW X Bit 3 SSP3 RW X Bit 2 SSP2 RW X Bit 1 SSP1 RW X Bit 0 SSP0 RW X SMBUS Table: SRC Spread Spectrum Control Register Byte 24 Name Control Function Type 0 1 Default Bit 7 SSP15 RW X Bit 6 SSP14 RW X Bit 5 SSP13 RW X Bit 4 SSP12 RW X Bit 3 SSP11 RW X Bit 2 SSP10 RW X Bit 1 SSP9 RW X Bit 0 SSP8 RW X Spread Spectrum Programming bit(15:8) These bits set the SRC spread pecentages.Please contact IDT for the appropriate values. Reserved Byte 28 has the N Divider LSB (bit 0) for CPU M/N Reserved Reserved These bits set the SRC spread pecentages.Please contact IDT for the appropriate values. M Divider Programming bit (5:0) The decimal representation of M and N Divider in Byte 21 and 22 configure the SRC VCO frequency. See M/N Caculation Tables for VCO frequency formulas. The decimal representation of M and N Divider in Byte 21 and 22 configure the SRC VCO frequency. See M/N Caculation Tables for VCO frequency formulas. Spread Spectrum Programming bit(7:0) N Divider Programming Byte16 bit(7:0) and Byte15 bit(7:6) CPU Divider Ratio Programming Bits |
|
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
New Zealand ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
