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IDT74FCT810BT/CT

FASTCMOSBUFFER/CLOCKDRIVER

COMMERCIALTEMPERATURERANGE

MAY 2010

2001

Integrated Device Technology, Inc.

DSC-4646/3

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IDT74FCT810BT/CT

COMMERCIAL TEMPERATURE RANGE

FAST CMOS

BUFFER/CLOCK DRIVER

FUNCTIONAL BLOCK DIAGRAM

FEATURES:

• 0.5 MICRON CMOS Technology

• Guaranteed low skew < 600ps (max.)

• Very low duty cycle distortion < 700ps (max.)

• Low CMOS levels

• TTL compatible inputs and outputs

• TTL level output voltage swings

• High drive: -32mA IOH, +48mA IOL

• Two independent output banks with 3-state control:

– One 1:5 inverting bank

– One 1:5 non-inverting bank

• Available in QSOP, SSOP, and SOIC packages

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

PIN CONFIGURATION

QSOP/ SOIC/ SSOP

TOP VIEW

DESCRIPTION:

The 74FCT810T is a dual bank inverting/ non-inverting clock driver

built using advanced dual metal CMOS technology. It consists of two banks

of drivers, one inverting and one non-inverting. Each bank drives five output

buffersfromastandardTTL-compatibleinput.TheFCT810Thas lowoutput

skew, pulse skew and package skew. Inputs are designed with hysteresis

circuitry for improved noise immunity. The outputs are designed with TTL

output levels and controlled edge rates to reduce signal noise. The part has

multiple grounds, minimizing the effects of ground inductance.

OEA

IN A

OA1 -O A5

5

OE B

IN B

OB1 -O B5

5

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

OA1

OA3

GND

OA4

OA5

OA2

OEA

INA

VCC

GND

OB1

OB2

OB3

GND

OB4

GND

INB

OB5

OEB

VCC