CY2318BNZ
Document #: 38-07217 Rev. **
Page 2 of 8
Device Functionality
Pin Summary
Name
Pins
Description
VDD
3, 7, 12, 16, 20, 29, 33, 37, 42, 46
3.3V Digital voltage supply
VSS
6, 10, 15, 19, 22, 27, 30, 34, 39, 43
Ground
VDDIIC
23
SMBus Voltage supply
VSSIIC
26
Ground for SMBus
BUF_IN
11
Input clock (5V tolerant)
OE
38
Output Enable (active HIGH), Three-state outputs when LOW[1]
SDATA
24
SMBus data input[1]
SCLK
25
SMBus clock input[1]
SDRAM [0–3]
4, 5, 8, 9
SDRAM byte 0 clock outputs
SDRAM [4–7]
13, 14, 17, 18
SDRAM byte 1 clock outputs
SDRAM [8–11]
31, 32, 35, 36
SDRAM byte 2 clock outputs
SDRAM [12–15]
40, 41, 44, 45
SDRAM byte 3 clock outputs
SDRAM [16–17]
21, 28
SDRAM clock outputs usable for feedback
N/C
1, 2, 47, 48
Reserved for future modifications, do not connect in system
Note:
1.
Internal pull-up resistor to VDD (value > 100 kohms).
OE
SDRAM [0–17]
0Hi-Z
11 x BUF_IN
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