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DA7281-00FVC Datasheet(PDF) 13 Page - Renesas Technology Corp |
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DA7281-00FVC Datasheet(HTML) 13 Page - Renesas Technology Corp |
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13 / 88 page ![]() DA7281 LRA/ERM Haptic Driver with Multiple I²C Addresses, Integrated Waveform Memory, and Wideband Support Datasheet Revision 3.1 10-Feb-2022 CFR0011-120-00 13 of 87 © 2022 Renesas Electronics Parameter Description Conditions Min Typ Max Unit fIN_PWM PWM data input frequency 10 250 kHz RDS_ON H-bridge drain to source resistance when on High side plus low side FETs 2 Ω ZFLT_UZ Actuator under- impedance threshold Not applicable for coin ERM 4 Ω ZFTL_OZ Over-impedance threshold Not applicable for coin ERM 50 Ω ZOUT_OFF Output impedance when H-bridge not switching Pull-down enabled 15 kΩ VDD_POR_FALL VDD Power-on-Reset (PoR) falling threshold 2.4 2.55 2.7 V Note 1 For operation up to 500 mA (instead of 250 mA), see Section 5.7.12. Note 2 For operation outside this range, see Section 5.7.1. 4.4 Timing Characteristics Unless otherwise noted, the parameters listed in Table 8 are valid for TA = 25 ºC, VDD = 3.8 V, and VDDIO = 1.8 V. Table 8: Timing Characteristics Parameter Description Conditions Min Typ Max Unit tON Cold boot to IDLE state time VDD present and PoR released 1.2 1.5 ms tOUT_IDLE Time to output from IDLE state From GPI or I2C trigger to output drive 0.75 ms tOUT_STANDBY Time to output from STANDBY state From GPI or I2C trigger to output drive 0.15 ms STOP SDA SCL tFALL tRISE tFALL START tHOLD_START tHOLD_DATA 1/fSCL 70% 30% 70% 30% tSETUP_DATA tLO_SCL tHI_SCL tDATA ACK tDATA_ACK tSETUP_STOP tSETUP_START Figure 4: I2C Interface Timing Table 9: I2C Interface Timing Requirements Parameter Description Conditions Min Max Unit tBUF Bus free time from STOP to START condition 0.5 µs Standard, Fast, and Fast-Plus Modes CBUS Bus line capacitive load 520 pF |
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