M95M02-DFCS5PSLASHKF datasheet(9/45 Pages) STMICROELECTRONICS

9 / 45 page

5.1.4

Power-down

During power-down (continuous decrease of the VCC supply voltage below the minimum VCC operating voltage

defined in Section 9 DC and AC parameters), the device must be:

•

deselected (chip select S must be allowed to follow the voltage applied on VCC)

•

in standby power mode (there must not be any internal write cycle in progress).

5.2

Active power and standby power modes

When chip select (S) is low, the device is selected, and in the active power mode. The device consumes ICC.

When chip select (S) is high, the device is deselected. If a write cycle is not currently in progress, the device then

goes into the standby power mode, and the device consumption drops to ICC1, as specified in DC characteristics

(see Section 9 DC and AC parameters).

5.3

Hold condition

The hold (HOLD) signal is used to pause any serial communications with the device without resetting the clocking

sequence.

To enter the hold condition, the device must be selected, with chip select (S) low.

During the hold condition, the serial data output (Q) is high impedance, and the serial data input (D) and the serial

clock (C) are "Don’t care".

Normally, the device is kept selected for the whole duration of the Hold condition. Deselecting the device while it is

in the hold condition has the effect of resetting the state of the device: this mechanism can be used, if required, to

reset the ongoing processes.

Note:

This resets the internal logic, except the WEL and WIP bits of the status register.

Note:

In the specific case where the device has moved in a write command (Inst + Address + data bytes, each data

byte being exactly 8 bits), deselecting the device also triggers the write cycle of this decoded command.

Figure 7. Hold condition activation

MS47281V1

Hold

condition

Hold

condition

HOLD

The hold condition starts when the hold (HOLD) signal is driven low when serial clock (C) is already low (as

shown in Figure 7).

Figure 7 also shows what happens if the rising and falling edges are not timed to coincide with serial clock (C)

being low.

M95M02-DR M95M02-DF

Active power and standby power modes

DS7024 - Rev 13

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