SLG51001

PMIC with High PSRR, Low Noise, Multi-Output LDOs

and Integrated Load Switch

Datasheet

Revision 3.01

10-May-2022

CFR0011-120-00

13 of 25

© 2022 Renesas Electronics Corporation

Parameter

Description

Conditions

Min

Typ

Max

Unit

Quiescent Current Specifications

IQ_ON_0mA

Quiescent current

IOUT = 0 mA

380

600

μA

IQ_ON_1mA

Quiescent current

IOUT = 1 mA

400

600

μA

IQ_ON_300mA

Quiescent current

IOUT = 300 mA

2.8

3.2

mA

RPD_OFF

Output pull down resistance

VOUT = 0.5 V

LDO disabled

40

Ω

Note 1

For programmable selections, refer to Section 4.4.1

Note 2

The overall accuracy can be calculated by summing VOUT_PP + VOUT_TEMP + VOUT_STATIC_LD +

VOUT_STATIC_LINE

Note 3

For VIN - VOUT < 350 mV, PSRR will be degraded.

3.8

LDO_HV Characteristics

In the LDO_HV electrical characteristics table, unless otherwise specified, all specifications are

guaranteed for VDD above 2.5 V and below 5 V, for VIN as defined in the table, and apply over the

full operating temperature range, see Section 3.1.1.

Table 10: LDO_HV (LDO2, 3, 4, and 5) Electrical Characteristics

Parameter

Description

Conditions

Min

Typ

Max

Unit

External Electrical Conditions

VIN

Input voltage

1.7

Note 1

3.8

5

V

COUT

Output capacitance

Effective capacitance after

derating

0.45

2.2

20

μF

IOUT_MAX

Maximum output current

VOUT drops 50 mV

Note 2

500

mA

Programmable Conditions

VOUT

Selectable output voltage

1.2

3.3

3.75

V

VOUT_LSB

LSB of output voltage

programming DAC (8-bit

control)

10

mV

IOUT_STA

RTUP_LIM

Start-up current limit,

programmable in 12 mA

steps

Note 3

At 90 % VOUT

30

150

606

mA

IOUT_FUN

C_LIM

Functional current limit,

programmable in 12 mA

steps

Note 3

30

550

606

mA