ZSPM4121 Datasheet

© 2016 Integrated Device Technology, Inc.

13

January 29, 2016

6.2.

Multi-Layer PCB Layout

The following are guidelines for mounting the exposed pad ZSPM4121 on a multi-Layer PCB with ground a plane.

In a multi-layer board application, the thermal vias are the primary method of heat transfer from the package

thermal pad to the internal ground plane. The efficiency of this method depends on several factors, including die

area, number of thermal vias, and thickness of copper, etc.

Figure 6.2

Package and PCB Land Configuration for Multi-Layer PCB

Package Thermal Pad

Solder Pad (Land Pattern)

Thermal Vias

Package Outline

Figure 6.3

JEDEC Standard FR4 Multi-Layer Board – Cross-Sectional View

(square)

Package Solder

Pad

Package Solder

Pad (bottom trace)

Thermal Via

Component Traces

Thermal Isolation

Power plane only

1.5748mm

0.0 - 0.071 mm Board

Base & Bottom Pad

0.5246 - 0.5606 mm

Power Plane

(1oz Cu)

1.0142 - 1.0502 mm

Ground Plane

(1oz Cu)

1.5038 - 1.5748 mm

Component Trace

(2oz Cu)

2 Plane

4 Plane

Figure 6.4 is a representation of how the heat can be conducted away from the die using an exposed pad

package. Each application will have different requirements and limitations, and therefore the user should use

sufficient copper to dissipate the power in the system. The output current rating of the linear regulators might

need to be de-rated for higher ambient temperatures. The de-rated value will depend on the calculated worst-

case power dissipation and the thermal management implementation in the application.