ICS9FG107 datasheet(17/19 Pages) RENESAS

17 / 19 page

IDTTM/ICSTM Programmable FTG for Differential P4

TM CPU, PCI-Express & SATA Clocks

ICS9FG107

REV F 08/21/07

ICS9FG107

Programmable FTG for Differential P4

TM CPU, PCI-Express & SATA Clocks

INDEX

AREA

INDEX

AREA

1 2

SEATING

PLANE

SEATING

PLANE

-C-

- C -

aaa C

M INMA X

MINMA X

A--

1.20

.047

A 1

0.05

0.15

.002

.006

A 2

0.80

1.05

.032

.041

0.170.27

.007.011

0.09

0.20

.0035

.008

E 1

6.00

6.20

.236

.244

0.450.75

.018.030

0°8°0°8°

aaa

0.10

.004

VA RIATIONS

M INMA X

MINMA X

12.40

12.60

.488

.496

10-0039

SE E VA RIA TIONS

D mm .

48-Lead, 6.10 m m . Body, 0.50 m m . Pitch TS SOP

(240 m il)

(20 m il)

SYM BOL

SE E VA RIA TIONS

COM MON DIME NSIONS

SE E VA RIA TIONS

Reference Doc.: JEDEC Publication 95, MO-153

In M illimeters

In Inches

COM MON DIME NSIONS

0.50 BAS IC

0.020 BA SIC

8.10 BAS IC

0.319 BA SIC

D (inch)

Ordering Information

ICS 9FG107yGLFT

Example:

Designation for tape and reel packaging

Lead Option (optional)

LF = Lead Free

LN = Lead Free Annealed

Package Type

G = TSSOP

Revision Designator (will not correlate with datasheet revision)

Device Type (consists of 3 or 4 digit numbers)

Prefix

ICS = Standard Device

ICS XXXX y G Lx T

ICS9FG107 Datasheet(PDF) 17 Page - Renesas Technology Corp

ICS9FG107 Datasheet(HTML) 17 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

Datasheet Download

Link URL