1112F—02/27/09

ICS9LP505-1

64-pin CK505 for Desktop Systems

IDT® 64-pin CK505 for Desktop Systems

17

Byte 10 CK505 Rev 0.85 functions (ICS Rev H silicon and higher)

Bit

Pin

Name

Description

Type

Default

7

SRC5_EN Readback

Readback of SRC5 enable latch

R

Latch

6

Reserved

RW

0

5

Reserved

RW

0

4

Reserved

RW

0

3

Reserved

RW

0

2

Reserved

RW

0

1

CPU 1 Stop Enable

Enables control of CPU1 with CPU_STOP#

RW

1

0

CPU 0 Stop Enable

Enables control of CPU 0 with CPU_STOP#

RW

1

Byte 11 Reserved Register

Bit

Pin

Name

Description

Type

Default

7

Reserved

RW

0

6

Reserved

RW

0

5

Reserved

RW

0

4

Reserved

RW

0

3

Reserved

RW

0

2

Reserved

RW

0

1

Reserved

RW

0

0

Reserved

RW

0

Byte 12 Byte Count Register

Bit

Pin

Name

Description

Type

Default

7

Reserved

RW

0

6

Reserved

RW

0

5

BC5

RW

0

4

BC4

RW

0

3

BC3

RW

1

2

BC2

RW

1

1

BC1

RW

0

0

BC0

RW

1

Read Back byte count register,

max bytes = 32

Reserved

Reserved

0

1

CPU/PCI Stop

SRC5 Enabled

-

-

-

-

-

-

-

-

-

-

Stoppable

Free Running

Free Running

Stoppable

0

1

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

0

1

-

-

-

-

*Accessing any SMBus bytes not shown in the datasheet could result in incorrect clock functions