MCF5484 datasheet(21/28 Pages) FREESCALE

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General Timing Specifications

MCF548x Integrated Microprocessor Electrical Characteristics, Rev. 2.4

Freescale Semiconductor

General Timing Specifications

Table 19 lists timing specifications for the GPIO, PSC, FlexCAN, DREQ, DACK, and external interrupts.

I2C Input/Output Timing Specifications

Table 20 lists specifications for the I2C input timing parameters shown in Figure 19.

Table 21 lists specifications for the I2C output timing parameters shown in Figure 19.

Table 19. General AC Timing Specifications

Name

Characteristic

Min

Max

Unit

CLKIN high to signal output valid

—

PSTCLK

CLKIN high to signal invalid (output hold)

—

Signal input pulse width

—

PSTCLK

Table 20. I2C Input Timing Specifications between SCL and SDA

Num

Characteristic

Min

Max

Units

Start condition hold time

—

Bus clocks

Clock low period

—

Bus clocks

SCL/SDA rise time (VIL = 0.5 V to VIH = 2.4 V)

—

Data hold time

—

SCL/SDA fall time (VIH = 2.4 V to VIL = 0.5 V)

—

Clock high time

—

Bus clocks

Data setup time

—

Start condition setup time (for repeated start condition only)

—

Bus clocks

Stop condition setup time

—

Bus clocks

Table 21. I2C Output Timing Specifications between SCL and SDA

Num

Characteristic

Min

Max

Units

I11

Start condition hold time

—

Bus clocks

I2 1

Clock low period

—

Bus clocks

I3 2

SCL/SDA rise time (VIL = 0.5 V to VIH = 2.4 V)

—

µS

I4 1

Data hold time

—

Bus clocks

I5 3

SCL/SDA fall time (VIH = 2.4 V to VIL = 0.5 V)

—

I6 1

Clock high time

—

Bus clocks

I7 1

Data setup time

—

Bus clocks

I8 1

Start condition setup time (for repeated start

condition only)

—

Bus clocks

I9 1

Stop condition setup time

—

Bus clocks

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