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November 16, 2007

IDT70P9268

Very Low Power 16K x 16 Synchronous Mobile Multimedia Interface (M2I) Dual Port Static RAM

Industrial Temperature Range

Timing Waveform of Non-Mux’d Port Write with Counter Advance

NOTES:

1.

CE, UB/LB, and R/W = VIL; CNTRPT = VIH.

2.

CE, UB/LB = VIL.

3. The "Internal Address" is equal to the "External Address" when

ADS = VIL and equals the counter output when ADS = VIH.

4.

CNTEN = VIL advances Internal Address from ‘An’ to ‘An +1’. The transition shown indicates the time required for the counter to advance. The ‘An +1’Address is written to during this

cycle.

CLK

Dn+1

Dn

Dn+2

Dn+1

ADS

tSAD

tHAD

tSA

tHA

An

tSA

tHA

An

An+1

An+2

An+3

An+4

tSCN

tHCN

Dn+3

WRITE EXTERNAL ADDRESS

WRITE WITH COUNTER

WRITE COUNTER HOLD

ADDRESS

INTERNAL

ADDRESS

CNTEN

DATAIN

Dn+4