IDT72T7285 datasheet(21/55 Pages) RENESAS

21 / 55 page

COMMERCIAL AND INDUSTRIAL

TEMPERATURE RANGES

IDT72T7285/72T7295/72T72105/72T72115 2.5V TeraSync

™

™ 72-BIT FIFO

16,384 x 72, 32,768 x 72, 65,536 x 72, 131,072 x 72

SIGNAL DESCRIPTION

INPUTS:

DATA IN (D0 - Dn)

Data inputs for 72-bit wide data (D0 - D71), data inputs for 36-bit wide data

(D0 - D35) or data inputs for 18-bit wide data (D0 - D17).

CONTROLS:

MASTER RESET ( MRS )

AMasterResetisaccomplishedwhenevertheMRSinputistakentoaLOW

state.Thisoperationsetstheinternalreadandwritepointerstothefirstlocation

oftheRAMarray.PAEwill goLOW, PAFwillgoHIGH,and HF willgoHIGH.

If FWFT/SI is LOW during Master Reset then the IDT Standard mode,

along with EF and FF are selected. EF will go LOW and FF will go HIGH. If

FWFT/SIisHIGH,thentheFirstWordFallThroughmode(FWFT),alongwith

IR and OR, are selected. OR will go HIGH and IR will go LOW.

AllcontrolsettingssuchasOW,IW,BM,BE,RM,PFMandIParedefined

during the Master Reset cycle.

DuringaMasterReset,theoutputregisterisinitializedtoallzeroes.AMaster

Resetisrequiredafterpowerup,beforeawriteoperationcantakeplace.MRS

isasynchronous.

See Figure 9, Master Reset Timing, for the relevant timing diagram.

PARTIAL RESET (PRS)

APartialResetisaccomplishedwheneverthePRS inputistakentoaLOW

state. As in the case of the Master Reset, the internal read and write pointers

aresettothefirstlocationoftheRAMarray,PAEgoesLOW, PAFgoesHIGH,

and HF goes HIGH.

WhichevermodeisactiveatthetimeofPartialReset,IDTStandardmode

orFirstWordFallThrough,thatmodewillremainselected. IftheIDTStandard

mode is active, then FF will go HIGH and EF will go LOW. If the First Word

Fall Through mode is active, then OR will go HIGH, and IR will go LOW.

Following Partial Reset, all values held in the offset registers remain

unchanged. The programming method (parallel or serial) currently active at

thetimeofPartialResetisalsoretained. Theoutputregisterisinitializedtoall

zeroes. PRS is asynchronous.

A Partial Reset is useful for resetting the device during the course of

operation,whenreprogrammingprogrammableflagoffsetsettingsmaynotbe

convenient.

See Figure 10, Partial Reset Timing, for the relevant timing diagram.

ASYNCHRONOUS WRITE (ASYW)

ThewriteportcanbeconfiguredforeitherSynchronousorAsynchronous

mode of operation. If during Master Reset the ASYW input is LOW, then

Asynchronous operation of the write port will be selected. During Asynchro-

nousoperationofthewriteporttheWCLKinputbecomesWRinput,thisisthe

Asynchronouswritestrobeinput.ArisingedgeonWRwillwritedatapresent

ontheDninputsintotheFIFO.(WEN mustbetiedLOWwhenusingthewrite

port in Asynchronous mode).

WhenthewriteportisconfiguredforAsynchronousoperationthefullflag

(FF)operatesinanasynchronousmanner,thatis,thefullflagwillbeupdated

based in both a write operation and read operation. Note, if Asynchronous

mode is selected, FWFT is not permissable. Refer to Figures 30, 31, 34 and

35forrelevanttimingandoperationalwaveforms.

ASYNCHRONOUS READ (ASYR)

ThereadportcanbeconfiguredforeitherSynchronousorAsynchronous

mode of operation. If during a Master Reset the ASYR input is LOW, then

Asynchronous operation of the read port will be selected. During Asynchro-

nousoperationofthereadporttheRCLKinputbecomesRDinput,thisisthe

Asynchronous read strobe input. A rising edge on RD will read data from the

FIFO via the output register and Qn port. (REN must be tied LOW during

Asynchronous operation of the read port).

The OE input provides three-state control of the Qn output bus, in an

asynchronousmanner.(RCS,providesthree-statecontrolofthereadportin

Synchronousmode).

When the read port is configured for Asynchronous operation the device

mustbeoperatingonIDTstandardmode,FWFTmodeisnotpermissibleifthe

readportisAsynchronous.TheEmptyFlag(EF)operatesinanAsynchronous

manner,thatis,theemptyflagwillbeupdatedbasedonbothareadoperation

andawriteoperation.Refertofigures32,33,34and35forrelevanttimingand

operationalwaveforms.

RETRANSMIT (RT)

The Retransmit (RT) input is used in conjunction with the MARK input,

togethertheyprovideameansbywhichdatapreviouslyreadoutoftheFIFO

canberereadanynumberoftimes.Ifretransmitoperationhasbeenselected

(i.e.theMARKinputisHIGH),arisingedgeonRCLKwhileRTisLOWwillreset

thereadpointerbacktothememorylocationsetbytheuserviatheMARKinput.

IfIDTstandardmodehasbeenselectedtheEFflagwillgoLOWandremain

LOW for the time that RT is held LOW. RT can be held LOW for any number

ofRCLKcycles,thereadpointerbeingresettothemarkedlocation.Thenext

rising edge of RCLK after RT has returned HIGH, will cause EF to go HIGH,

allowingreadoperationstobeperformedontheFIFO.Thenextreadoperation

willaccessdatafromthe‘marked’memorylocation.

Subsequentretransmitoperationsmaybeperformed,eachtimetheread

pointerreturningtothe‘marked’location.SeeFigure18,RetransmitfromMark

(IDT Standard mode) for the relevant timing diagram.

IfFWFTmodehasbeenselectedtheORflagwillgoHIGHandremainHIGH

forthetimethatRTisheldLOW.RTcanbeheldLOWforanynumberofRCLK

cycles, the read pointer being reset to the ‘marked’ location. The next RCLK

risingedgeafterRThasreturnedHIGH,willcauseORtogoLOWanddueto

FWFToperation,thecontentsofthemarkedmemorylocationwillbeloadedonto

the output register, a read operation being required for all subsequent data

reads.

Subsequentretransmitoperationsmaybeperformedeachtimetheread

pointerreturningtothe‘marked’location.SeeFigure19,RetransmitfromMark

(FWFT mode) for the relevant timing diagram.

MARK

TheMARKinputisusedtoselectRetransmitmodeofoperation.AnRCLK

rising edge while MARK is HIGH will mark the memory location of the data

currently present on the output register, the device will also be placed into

retransmitmode.Note,fortheIDT72T7285/72T7295/72T72105,theremust

beaminimumof128bytesofdatabetweenthewritepointerandreadpointer

whentheMARKisasserted.FortheIDT72T72115,theremustbeaminimum

of256bytesofdatabetweenthewritepointerandreadpointerwhentheMARK

isasserted.Remember,8(x9)bytes=4(x18)words=2(x36)words=1(x72)

word.Also,oncetheMARKisset,thewritepointerwillnotincrementpastthe

“marked” location until the MARK is deasserted. This prevents “overwriting”

ofretransmitdata.

TheMARKinputmustremainHIGHduringthewholeperiodofretransmit

mode, a falling edge of RCLK while MARK is LOW will take the device out of

retransmitmodeandintonormalmode.AnynumberofMARKlocationscanbe

setduringFIFOoperation,onlythelastmarkedlocationtakingeffect.Oncea

marklocationhasbeensetthewritepointercannotbeincrementedpastthis

IDT72T7285 Datasheet(PDF) 21 Page - Renesas Technology Corp

IDT72T7285 Datasheet(HTML) 21 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55

Datasheet Download

Link URL