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CYT4DNJBJS Datasheet(PDF) 191 Page - Infineon Technologies AG |
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CYT4DNJBJS Datasheet(HTML) 191 Page - Infineon Technologies AG |
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191 / 209 page ![]() Datasheet 191 002-24601 Rev. *I 2023-02-14 TRAVEO™ T2G 32-bit Automotive MCU Based on Arm® Cortex®-M7 dual Appendix 29 Appendix 29.1 External IP revisions 29.2 Internal IP revisions 29.3 MIPI formats supported Table 29-1 External IP revisions Module IP Revision Vendor CANFD mxttcanfd M_TTCAN IP revision: Rev.3.2.3 Bosch Arm® Cortex®-M0+ armcm0p Cortex-M0+-r0p1 Arm® Arm® Cortex®-M7 armcm7 Cortex-M7-r1p2 Arm® Arm® Coresight armcoresighttk CoreSight-SoC-TM100-r3p2 Arm® Ethernet mxeth GEM_GXL r1p09 Cadence Table 29-2 Internal IP revisions Module Revision SMIF SMIF version 3.0 (Rev. A), and version 4.0 (Rev. B onwards) Table 29-3 MIPI formats supported MIPI Format ID Remarks YUV422 8-bit 0x1E Full processing supported YUV422 10-bit 0x1F RGB888 0x24 RGB666 0x23 RGB565 0x22 RGB555 0x21 RGB444 0x20 RAW8 0x2A Data can be written to VRAM as is, no color processing or format conversion supported. RAW10 0x2B RAW12 0x2C RAW14 0x2D RAW16 0x2E RAW20 0x2F Generic 8-bit Long Packet Data Types 0x10 Supported 0x11 Data can be written to VRAM as is, no color processing or format conversion supported. 0x12 User Defined Byte-based Data 0x30 - 0x37 Data can be written to VRAM as is, no color processing or format conversion supported. |
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