IDT82V2604 datasheet(21/98 Pages) RENESAS

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INTERFACE

December 4, 2006

IDT82V2604

Inverse Multiplexing for ATM

T1 ISDN Mode

The T1 ISDN mode corresponds to the use of 23 time slots to

transmit data, that is, T1 data is not transmitted during the framing bit

and time slot 24. Therefore, only 23 time slots are considered useful and

are mapped while time slot 24 and the framing bit are meaningless and

are not mapped.

T1 Normal Mode

In this mode, data is not transmitted during the framing bit. The other

24 time slots are useful.

3.2.1.3 Mode5~Mode6

In these modes, the transmit/receive data rate is T1 channelized, and

the line interface timing clock is 1.544 MHz (T1 clock). The ISDN mode

and normal mode are defined in T1 ISDN Mode and T1 Normal Mode on

page 21.

In these modes, the clock for Tx and Rx can be either common clock

or independent clock. If common clock is used, TSCCK and RSCCK are

used as Tx clock and Rx clock respectively, and TSCFS and RSCFS are

used as common frame pulse in Tx and Rx directions respectively. If

independent clock is used, TSCK[i] and RSCK[i] are used as Tx clock

and Rx clock respectively, and TSF[i] and RSF[i] are used as the frame

pulse in Tx and Rx directions respectively.

3.2.1.4 Mode7~Mode10

In these modes, only TSCCK and RSCCK are used to input the

8.192 MHz clock in Tx and Rx directions respectively, and TSCFS and

RSCFS are used as common frame pulse in Tx and Rx directions

respectively. All the TSCK[i], TSF[i], RSCK[i] and RSF[i] pins are not

used and should be connected to ground. The unused RSD pins should

also be connected to ground.

The data pins used for multiplexing are shown in the table below:

Multi-rate

Multi-rate is used for multiplexing four E1 streams into one high-

speed stream. Figure-7 shows four 2.048 MHz E1 streams multiplexed

into a single 8.192 MHz stream through one data pin. The multiplexing

uses the round-robin technology. The system provides 8.192 MHz

common clock and 8 kHz common frame pulse.

For T1 channel, before multiplexing, a mapping from each T1 frame

to E1 frame is first done. Then the mapped 4 E1 channels are multi-

plexed into one 8.192 MHz stream as shown in Figure-7.

Figure-7 Multiplexing Four 2 MHz Streams into One 8

MHz Stream

T1 Multi-Rate Mode

Since there are two T1 to E1 mapping methods that can be used as

described in G.802 Mapping and Spaced Mapping on page 19, two new

modes can be derived when multiplexing is further used. Again, T1

ISDN data mode and T1 normal mode can be applied, thus we have 4

more modes: mode7~mode10.

3.2.1.5 Mode11

In this mode, the transmit and receive data are viewed as a contin-

uous 2.048 Mb/s serial stream. There is no concept of time slot in an

unchannelized link. Each eight bits are grouped into an octet. TSF or

TSCFS signal determine whether the data stream is in byte alignment or

not. The first bit received/transmitted is the most significant bit of an

octet while the last bit is the least significant bit. The 2.048 MHz data

stream clock is provided by the system.

In this mode, the clock for Tx and Rx can be either common clock or

independent clock. If common clock is used, TSCCK and RSCCK are

used as Tx clock and Rx clock respectively. If independent clock is used,

the clock for the i-th link comes from TSCK[i] and RSCK[i] in Tx and Rx

directions respectively.

In Common Clock Mode, the TSCFS signal is used for byte align-

ment pulse for the transmitted bit stream while in Independent Clock

Mode, the TSF[i] signal is used for byte alignment pulse for the i-th

transmit link.

The frequency for TSF[i] (or TSCSF) is the result of TSCK[i] (or

TSCCK) divided by 256 and the pulse width of this signal is one cycle of

TSCK[i] or TSCCK signal.

3.2.1.6 Mode12~Mode13

These two modes are E1 non-multi-rate combined with different

signalling modes. The non-multi-rate is the channelized generic E1 inter-

face, i.e., a 2.048 MHz channel is divided into 32 sub-channels (also

called time slots), and these sub-channels are used to exchange data.

In these modes, the clock for Tx and Rx can be either common clock

or independent clock. If common clock is used, TSCCK and RSCCK are

used as Tx clock and Rx clock respectively, and TSCFS and RSCFS are

used as common frame pulse in Tx and Rx directions respectively. If

independent clock is used, TSCK[i] and RSCK[i] are used as Tx clock

and Rx clock respectively, and TSF[i] and RSF[i] are used as the frame

pulse in Tx and Rx directions respectively.

Table-3 Pins Used in Multi-Rate Multiplex Mode

Tx Pin Name

Rx Pin Name

Multiplexed Channel

TSD[1]

RSD[1]

channel 1~channel 4

Byte0

Byte1

Byte2

Byte0

Byte1

Byte2

Byte0

Byte1

Byte2

Byte0

Byte1

Byte2

1st 2 Mbps stream

2nd 2 Mbps stream

3rd 2 Mbps stream

4th 2 Mbps stream

8 Mbps stream

IDT82V2604 Datasheet(PDF) 21 Page - Renesas Technology Corp

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