STM32H7 datasheet(152/357 Pages) STMICROELECTRONICS

152 / 357 page

Electrical characteristics (rev Y)

STM32H742xI/G STM32H743xI/G

152/357

DS12110 Rev 10

Figure 27. Asynchronous multiplexed PSRAM/NOR write waveforms

NBL

Data

FMC_ NEx

FMC_ NBL[1:0]

FMC_ AD[15:0]

tv(BL_NE)

th(Data_NWE)

FMC_NOE

Address

FMC_ A[25:16]

tv(A_NE)

tw(NWE)

FMC_NWE

tv(NWE_NE)

t h(NE_NWE)

th(A_NWE)

th(BL_NWE)

t v(A_NE)

tw(NE)

MS32756V1

Address

FMC_NADV

t v(NADV_NE)

tw(NADV)

tv(Data_NADV)

th(AD_NADV)

FMC_NWAIT

tsu(NWAIT_NE)

th(NE_NWAIT)

Table 72. Asynchronous multiplexed PSRAM/NOR write timings(1)

Symbol

Parameter

Min

Max

Unit

tw(NE)

FMC_NE low time

4Tfmc_ker_c − 14Tfmc_ker_ck

tv(NWE_NE) FMC_NEx low to FMC_NWE low

Tfmc_ker_c − 1Tfmc_ker_ck + 0.5

tw(NWE)

FMC_NWE low time

2Tfmc_ker_ck− 0.5 2Tfmc_ker_ck+ 0.5

th(NE_NWE) FMC_NWE high to FMC_NE high hold time

Tfmc_ker_ck − 0.5

tv(A_NE)

FMC_NEx low to FMC_A valid

tv(NADV_NE) FMC_NEx low to FMC_NADV low

0.5

tw(NADV)

FMC_NADV low time

Tfmc_ker_ck

Tfmc_ker_ck+ 1

th(AD_NADV) FMC_AD(address) valid hold time after FMC_NADV high Tfmc_ker_ck+0.5

th(A_NWE)

Address hold time after FMC_NWE high

Tfmc_ker_ck+0.5

th(BL_NWE) FMC_BL hold time after FMC_NWE high

Tfmc_ker_ck − 0.5

tv(BL_NE)

FMC_NEx low to FMC_BL valid

0.5

tv(Data_NADV) FMC_NADV high to Data valid

Tfmc_ker_ck + 2

th(Data_NWE) Data hold time after FMC_NWE high

Tfmc_ker_ck+0.5

1. Guaranteed by characterization results.

STM32H7 Datasheet(PDF) 152 Page - STMicroelectronics

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