Electronic Components Datasheet Search
  New Zealand  ▼
ALLDATASHEET.CO.NZ

X  

STM32H7 Datasheet(PDF) 283 Page - STMicroelectronics

Part # STM32H7
Description  32-bit Arm® Cortex®-M7 480MHz MCUs, up to 2MB flash, up to 1MB RAM, 46 com. and analog interfaces
PDF  357 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32H7 Datasheet(HTML) 283 Page - STMicroelectronics

Back Button STM32H7 Datasheet HTML 279Page - STMicroelectronics STM32H7 Datasheet HTML 280Page - STMicroelectronics STM32H7 Datasheet HTML 281Page - STMicroelectronics STM32H7 Datasheet HTML 282Page - STMicroelectronics STM32H7 Datasheet HTML 283Page - STMicroelectronics STM32H7 Datasheet HTML 284Page - STMicroelectronics STM32H7 Datasheet HTML 285Page - STMicroelectronics STM32H7 Datasheet HTML 286Page - STMicroelectronics STM32H7 Datasheet HTML 287Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 283 / 357 page
background image
DS12110 Rev 10
283/357
STM32H742xI/G STM32H743xI/G
Electrical characteristics (rev V)
320
Figure 92. ADC accuracy characteristics
Figure 93. Typical connection diagram when using the ADC with FT/TT pins
featuring analog switch function
1. Refer to Section 7.3.20: 16-bit ADC characteristics for the values of RAIN and CADC.
2. Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the
pad capacitance (refer to Table 157: I/O static characteristics for the value of the pad capacitance). A high
Cparasitic value downgrades conversion accuracy. To remedy this, fADC should be reduced.
3. Refer to Table 157: I/O static characteristics for the value of Ilkg.
4. Refer to Figure 68: Power supply scheme.
MSv19880V6
(1) Example of an actual transfer curve
(2) Ideal transfer curve
(3) End-point correlation line
n = ADC resolution
ET = total unadjusted error: maximum deviation
between the actual and ideal transfer curves
EO = offset error: maximum deviation between the first
actual transition and the first ideal one
EG = gain error: deviation between the last ideal
transition and the last actual one
ED = differential linearity error: maximum deviation
between actual steps and the ideal one
EL = integral linearity error: maximum deviation between
any actual transition and the end point correlation line
2
n-1
7
6
5
4
3
2
1
0
Output code
EO
VSSA
2
n-2
2
n-3
VREF+ (VDDA)
ET
EL
ED
1 LSB ideal
EG
(1)
(2)
(3)
(or
)]
[1LSB =
VDDA
2
n
VREF+
2
n
MSv67871V3
Sample-and-hold ADC converter
Converter
Cparasitic
(2)
Ilkg
(3)
CADC
VDDA
(4)
RAIN
(1)
VAIN
RADC
VREF+
(4)
VSSA
I/O
analog
switch
Sampling
switch with
multiplexing
VSS
VSS



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com