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PIC18F6310 Datasheet(PDF) 13 Page - Microchip Technology |
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PIC18F6310 Datasheet(HTML) 13 Page - Microchip Technology |
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13 / 404 page  2004 Microchip Technology Inc. Preliminary DS39635A-page 11 PIC18F6310/6410/8310/8410 FIGURE 1-2: PIC18F8310/8410 (80-PIN) BLOCK DIAGRAM PRODL PRODH 8 x 8 Multiply 8 BITOP 8 8 ALU<8> 8 8 3 Note 1: CCP2 multiplexing is determined by the settings of the CCP2MX and PM1:PM0 configuration bits. 2: RG5 is only available when MCLR functionality is disabled. 3: OSC1/CLKI and OSC2/CLKO are only available in select oscillator modes and when these pins are not being used as digital I/O. Refer to Section 2.0 “Oscillator Configurations” for additional information. W 8 8 8 Power-up Timer Oscillator Start-up Timer Power-on Reset Watchdog Timer OSC1(3) OSC2(3) VDD, Brown-out Reset Internal Oscillator Fail-Safe Clock Monitor Precision Reference Band Gap VSS MCLR(2) Block INTRC Oscillator 8 MHz Oscillator Single-Supply Programming In-Circuit Debugger T1OSI T1OSO PORTH RH7:RH4 RH3/AD19:RH0/AD16 PORTA PORTB PORTC RA4/T0CKI RA5/AN4/HLVDIN RB0/INT0 RC0/T1OSO/T13CKI RC1/T1OSI/CCP2(1) RC2/CCP1 RC3/SCK/SCL RC4/SDI/SDA RC5/SDO RC6/TX1/CK1 RC7/RX1/DT1 RA3/AN3/VREF+ RA2/AN2/VREF- RA1/AN1 RA0/AN0 RB1/INT1 RB2/INT2 RB3/INT3/CCP2(1) PORTD OSC2/CLKO(3)/RA6 RB4/KBI0 RB5/KBI1 RB6/KBI2/PGC RB7/KBI3/PGD OSC1/CLKI(3)/RA7 PORTE PORTF RF0/AN5 RF1/AN6/C2OUT RF2/AN7/C1OUT RF3/AN8 RF4/AN9 RF5/AN10/CVREF RF6/AN11 RF7/SS PORTG RG0/CCP3 RG1/TX2/CK2 RG2/RX2/DT2 RG3 RG4 RG5(2)/MCLR/VPP EUSART1 Comparators MSSP Timer2 Timer1 Timer3 Timer0 HLVD CCP1 BOR ADC 10-bit AUSART2 CCP2 CCP3 Instruction Decode & Control Data Latch Data Memory (8/16 Kbytes) Address Latch Data Address<12> 12 Access BSR FSR0 FSR1 FSR2 inc/dec logic Address 412 4 PCH PCL PCLATH 8 31 Level Stack Program Counter Address Latch Program Memory (48/64 Kbytes) Data Latch 20 Table Pointer<21> inc/dec logic 21 8 Data Bus<8> TABLE LATCH 8 IR 12 ROM LATCH PCLATU PCU Instruction Bus <16> STKPTR Bank State Machine Control Signals Decode AD15:AD0, A19:A16 RD7/AD7/PSP7: RD0/AD0/PSP0 RE0/AD8/RD RE1/AD9/WR RE2/AD10/CS RE3/AD11 RE4/AD12 RE5/AD13 RE6/AD14 RE7/CCP2(1)/AD15 PORTJ RJ0/ALE RJ1/OE RJ2/WRL RJ3/WRH RJ4/BA0 RJ5/CE RJ6/LB RJ7/UB (Multiplexed with PORTD, PORTE and PORTH) |
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