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STM32L151C6U6ADTR Datasheet(PDF) 85 Page - STMicroelectronics

Part # STM32L151C6U6ADTR
Description  Ultra-low-power 32-bit MCU ARM®-based Cortex®-M3,128KB Flash, 32KB SRAM, 4KB EEPROM, LCD, USB, ADC, DAC
PDF  130 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32L151C6U6ADTR Datasheet(HTML) 85 Page - STMicroelectronics

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STM32L151x6/8/B-A STM32L152x6/8/B-A
Electrical characteristics
105
Output driving current
The GPIOs (general purpose input/outputs) can sink or source up to ±8 mA, and sink or
source up to ±20 mA (with the non-standard VOL/VOH specifications given in Table 44.
In the user application, the number of I/O pins which can drive current must be limited to
respect the absolute maximum rating specified in Section 6.2:
•
The sum of the currents sourced by all the I/Os on VDD, plus the maximum Run
consumption of the MCU sourced on VDD, cannot exceed the absolute maximum rating
ΣIVDD (see Table 12).
•
The sum of the currents sunk by all the I/Os on VSS plus the maximum Run
consumption of the MCU sunk on VSS cannot exceed the absolute maximum rating
ΣIVSS (see Table 12).
Output voltage levels
Unless otherwise specified, the parameters given in Table 44 are derived from tests
performed under ambient temperature and VDD supply voltage conditions summarized in
Table 14. All I/Os are CMOS and TTL compliant.
Table 44. Output voltage characteristics
Symbol
Parameter
Conditions
Min
Max
Unit
VOL(1)(2)
Output low level voltage for an I/O pin
IIO = 8 mA
2.7 V < VDD < 3.6 V
-0.4
V
VOH(3)(2)
Output high level voltage for an I/O pin
VDD-0.4
-
VOL (1)(4) Output low level voltage for an I/O pin
IIO = 4 mA
1.65 V < VDD < 2.7 V
-0.45
VOH (3)(4) Output high level voltage for an I/O pin
VDD-0.45
-
VOL(1)(4)
Output low level voltage for an I/O pin
IIO = 15 mA
2.7 V < VDD < 3.6 V
-1.3
VOH(3)(4) Output high level voltage for an I/O pin
VDD-1.3
-
1. The IIO current sunk by the device must always respect the absolute maximum rating specified in Table 12 and the sum of
IIO (I/O ports and control pins) must not exceed IVSS.
2. Guaranteed by test in production.
3. The IIO current sourced by the device must always respect the absolute maximum rating specified in Table 12 and the sum
of IIO (I/O ports and control pins) must not exceed IVDD.
4. Guaranteed by characterization results.



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