IDTTM/ICSTM Low Cost DDR Phase Lock Loop Zero Delay Buffer

ICS93735

REV F 02/11/07

ICS93735

Low Cost DDR Phase Lock Loop Zero Delay Buffer

Absolute Max

Electrical Characteristics - Input/Supply/Common Output Parameters

TA = 0 - 70°C; Supply Voltage AVDD, VDD = 2.50V ± 0.20V (unless otherwise stated)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

RT = 120W, CL = 12 pF at 100MHz

236

300

RT = 120W, CL = 12 pF at 133MHz

263

300

IDDPD

CL=0 pF

100

mA

Output High Current

IOH

VDD = 2.5V, VOUT = 1V

-48

-33

-29

mA

Output Low Current

IOL

VDD = 2.5V, VOUT = 1.2V

29

33

37

mA

High Impedance

Ouptut Current

VDD = min to max, IOH = -1mA

2

2.25

V

VDD = 2.3V, IOH = -12mA

1.95

VDD = min to max, IOH = 1mA

0.05

0.1

V

VDD = 2.3V, IOH = 12mA

0.3

0.4

Output Capacitance

1

COUT

VI = VDD or GND

3

pF

1. Guaranteed by design, not 100% tested in production.

mA

10

VOH

mA

IDD2.5

Operating Supply Current

IOZ

VDD = 2.7V, VOUT = VDD or GND

Low-level Output Voltage

VOL

High-level Output Voltage

Supply Voltage (VDD & AVDD)

-0.5V to 3.6V

Logic Inputs

GND –0.5 V to VDD +0.5 V

Ambient Operating Temperature

0°C to +85°C

Storage Temperature

–65°C to +150°C

Stresses above those listed under

Absolute Maximum Ratings may cause permanent damage to the device. These ratings are

stress specifications only and functional operation of the device at these or any other conditions above those listed in the

operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods

may affect product reliability.