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UCD9080 Datasheet(PDF) 13 Page - Texas Instruments |
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UCD9080 Datasheet(HTML) 13 Page - Texas Instruments |
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13 / 32 page  www.ti.com CONFIGURING AND MONITORING THE UCD9080 MONITORING THE UCD9080 Register Map UCD9080 SLVS692A – SEPTEMBER 2006 – REVISED DECEMBER 2006 The UCD9080 supports both configuration and monitoring using its I2C slave interface. For monitoring of the sequencer, there is an I2C memory map that is used that allows an I2C host to perform memory mapped reads (and in some cases writes) that reports status information from the UCD9080. For instance, all rails can report their voltage through the I2C memory map. For information on which parameters are available via the I2C memory map, see the Monitoring the UCD9080 section. To change configuration parameters of the sequencer, a different mechanism is used. The entire set of configuration parameters must be written at one time to the device as one large transaction over the I2C interface. This ensures that the configuration of the device is consistent at any given time. The process for configuring the UCD9080 is described below in the section titled Configuring the UCD9080 section. The UCD9080 allows all monitoring of the system through the I2C interface on the device. The following is the memory map of the supported registers in the system. The detail of each of these registers is given in the next section as well. Note that the UCD9080 supports functionality to automatically increment the I2C register address value when a register is being accessed, to more efficiently access blocks of like registers. The table below also shows the amount that the register address is incremented for each register access. REGISTER NAME ADDRESS ACCESS ADJUSTMENT AFTER ACCESS RAIL1H 0x00 r +1 (0x01) RAIL1L 0x01 r +1 (0x02) RAIL2H 0x02 r +1 (0x03) RAIL2L 0x03 r +1 (0x04) RAIL3H 0x04 r +1 (0x05) RAIL3L 0x05 r +1 (0x06) RAIL4H 0x06 r +1 (0x07) RAIL4L 0x07 r +1 (0x08) RAIL5H 0x08 r +1 (0x09) RAIL5L 0x09 r +1 (0x0A) RAIL6H 0x0A r +1 (0x0B) RAIL6L 0x0B r +1 (0x0C) RAIL7H 0x0C r +1 (0x0D) RAIL7L 0x0D r +1 (0x0E) RAIL8H 0x0E r +1 (0x0F) RAIL8L 0x0F r –15 (0x00) ERROR1 0x20 r +1 (0x21) ERROR2 0x21 r +1 (0x22) ERROR3 0x22 r +1 (0x23) ERROR4 0x23 r +1 (0x24) ERROR5 0x24 r +1 (0x25) ERROR6 0x25 r –5 (0x20) STATUS 0x26 r +0 (0x26) RAILSTATUS1 0x28 r +1 (0x29) RAILSTATUS2 0x29 r –1 (0x28) FLASHLOCK 0x2E rw 0 (0x2E) RESTART 0x2F w +0 (0x2F) 13 Submit Documentation Feedback |
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