IDT™ / ICS™ LVDS/LVCMOS FREQUENCY SYNTHESIZER

13

ICS8440259DK-45 REV. A FEBRUARY 26, 2009

ICS8440259D-45

FEMTOCLOCK™ CRYSTAL/LVCMOS-TO-LVDS/ LVCMOS FREQUENCY SYNTHESIZER

POWER CONSIDERATIONS

This section provides information on power dissipation and junction temperature for the ICS8440259D-45.

Equations and example calculations are also provided.

1. Power Dissipation.

The total power dissipation for the ICS840259D-45 is the sum of the core power plus the analog power plus the power dissipated in

the load(s). The following is the power dissipation for V

DD

= 3.3V + 5% = 3.465V, which gives worst case results.

Core and LVDS Output Power Dissipation

• Power (core, LVDS) = V

DD_MAX

* (I

DD

+ I

DDO_LVDS

+ I

DDA

) = 3.465V * (118mA + 160mA + 35mA) = 1084.545mW

LVCMOS Output Power Dissipation

•

Power (LVCMOS, no-load) = V

DD_MAX

* I

DDO_LVCMOS

= 3.465V * 10mA = 34.65mW

•

Output Impedance R

OUT

Power Dissipation due to Loading 50

Ω to V

DDO

/2

Output Current I

OUT = VDDO_MAX / [2 * (50Ω + ROUT)] = 3.465V / [2 * (50Ω + 25Ω)] = 23.1mA

•

Power Dissipation on the R

OUT per LVCMOS output

Power (R

OUT) = ROUT * (IOUT)

2

= 25

Ω * (23.1mA)2 = 13.3mW per output

•

Total Power Dissipation on the R

OUT

Total Power (R

OUT) = 13.3mW * 4 = 53.2mW

•

Dynamic Power Dissipation at 125MHz

Power (125MHz) = C

PD * Frequency * (VDDO)

2

= 15pF * 125MHz * (3.465V)2 = 22.5mW per output

Total Power (125MHz) = 22.5mW * 3 = 67.5mW

•

Dynamic Power Dissipation at 3.9MHz

Power (3.9MHz) = C

PD * frequency * (VDDO)

2

= 15pF * 3.90625MHz * (3.465V)2 = 0.7mW per output

Total Power Dissipation

• Total Power

= Power (core, LVDS) + Power (LVCMOS-no load) + Total Power (R

OUT) + Total Power (125MHz) + Total Power (3.9MHz)

= 1084.545mW + 34.65mW + 53.2mW + 67.5mW + 0.7mW

= 1240.595mW