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STR91XF Datasheet(PDF) 55 Page - STMicroelectronics |
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STR91XF Datasheet(HTML) 55 Page - STMicroelectronics |
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55 / 72 page ![]() STR91xF Electrical characteristics 55/72 6.11 External memory bus timings VDDQ = 2.7 - 3.6V, VDD = 1.65 - 2V, TA = -40 / 85 °C unless otherwise specified. Table 16. EMI Bus Clock Period Notes: 1 EMI Bus clock is an internal clock only and is not available on the EMI bus pin 2 EMI_ratio =1/ 2 by default (can be programmed to be 1 by setting the proper bits in the SCU_CLKCNTR register) Table 17. EMI read operation Notes: 1 ALE_LENGTH = 1 by default (can be programmed to be 2 by setting the bits In the SCU_SCR0 register) 2 WSTRD = 1Fh by default (RD wait state time = WSTRD x tBCLK, WSTRD can be programmed in the EMI_RCRx Register) 3 WSTOEN = 1 by default (RD assertion delay from chip select. WSTOEN can be programmed in the EMI_OECRx Register) Symbol Parameter Value tBCLK EMI Bus Clock period 1 /(fHCLK x EMI_ratio) Symbol Parameter Value Unit Min Typ Max tRCR Read to CSn inactive 0 ns tRP Read Pulse Width (WSTRD-WSTOEN+1)* tBCLK ns tRDS Read Data Setup Time 4 ns tRDH Read Data Hold Time 0 ns tRAS Read Address Setup Time (WSTOEN)* tBCLK ns tRAH Read Address Hold Time 0 ns tAW ALE pulse width (ALE_LENGTH)* tBCLK ns tAAH Address to ALE hold time tBCLK/2 ns tAAS Address to ALE setup time (ALE_LENGTH)* tBCLK ns |
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