| Electronic Components Datasheet Search |
|
S29PL-N Datasheet(PDF) 45 Page - SPANSION |
|
|
|||||||||||||||||||||||||||||
S29PL-N Datasheet(HTML) 45 Page - SPANSION |
|
45 / 85 page ![]() November 23, 2005 S29PL-N_00_A4 S29PL-N MirrorBit™ Flash Family 43 Preliminary 7.5 Simultaneous Read/Write The simultaneous read/write feature allows the host system to read data from one bank of mem- ory while programming or erasing another bank of memory. An erase operation may also be suspended to read from or program another location within the same bank (except the sector being erased). Figure 11.12, Back-to-back Read/Write Cycle Timings shows how read and write cycles may be initiated for simultaneous operation with zero latency. See the table, DC Charac- teristics for read-while-program and read-while-erase current specifications. Note: Amax = A23 (PL256N), A22 (PL127N) Figure 7.5 Simultaneous Operation Block Diagram for S29PL256N and S29PL127N VCC VSS Bank A Address Bank B Address Amax – A0 RESET# WE# CE# DQ0 – DQ15 State Control and Command Register RY/BY# Bank A X-Decoder OE# DQ15 – DQ0 Status Control Amax–A0 Amax – A0 Mux Mux Mux Bank B X-Decoder Bank C X-Decoder Bank D X-Decoder Bank C Address Bank D Address WP#/ACC |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |