CDP1802ACD3 datasheet(11/27 Pages) RENESAS

Part #	CDP1802ACD3

Description	High-Reliability CMOS 8-Bit Microprocessor

PDF	27 Pages

Scroll/Zoom	100%

Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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11 / 27 page

CDP1802AC/3

FN1441 Rev 3.00

Page 11 of 27

October 17, 2008

FIGURE 8. INPUT CYCLE TIMING WAVEFORMS

FIGURE 9. OUTPUT CYCLE TIMING WAVEFORMS

Machine Cycle Timing Waveforms (Propagation Delays Not Shown) (Continued)

CLOCK

MEMORY

OUTPUT

ALLOWABLE MEMORY ACCESS

VALID OUTPUT

TPA

TPB

MACHINE

INSTRUCTION

MRD

N0 - N2

DATA

MWR

CYCLE

BUS

MEMORY READ CYCLE

MEMORY WRITE CYCLE

VALID DATA FROM INPUT DEVICE

N = 9 - F

EXECUTE (S1)

CYCLE (n + 1)

CYCLE n

FETCH (S0)

NOTE: USER GENERATED SIGNAL

“DON’T CARE” OR INTERNAL DELAYS

HIGH IMPEDANCE STATE

(NOTE)

CLOCK

TPA

TPB

MACHINE

INSTRUCTION

CYCLE

EXECUTE (S1)

CYCLE (n + 1)

CYCLE n

FETCH (S0)

DATA BUS

ALLOWABLE MEMORY ACCESS

VALID OUTPUT

VALID DATA FROM MEMORY

ALLOWABLE MEMORY ACCESS

MEMORY READ CYCLE

MRD

N0 - N2

DATA STROBE

(MRD ² TPB ² N)

NOTE: USER GENERATED SIGNAL

“DON’T CARE” OR INTERNAL DELAYS

HIGH IMPEDANCE STATE

(NOTE)

N = 1 - 9

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