P25T22L datasheet(21/45 Pages) PUYA

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P25T22L/12L Datasheet

Puya Semiconductor

Page 21 of 45

WIP bit.

The Write in Progress (WIP) bit indicates whether the memory is busy in program/erase/write status register

progress. When WIP bit sets to 1, means the device is busy in program/erase/write status register progress,

when WIP bit sets 0, means the device is not in program/erase/write status register progress.

WEL bit.

The Write Enable Latch (WEL) bit indicates the status of the internal Write Enable Latch. When set to 1 the

internal Write Enable Latch is set, when set to 0 the internal Write Enable Latch is reset and no Write Status

BP4, BP3, BP2, BP1, BP0 bits.

The Block Protect (BP4, BP3, BP2, BP1, and BP0) bits are non-volatile. They define the size of the area to be

software protected against Program and Erase commands. These bits are written with the Write Status

relevant memory area (as defined in Table “Protected Area Sizes”).becomes protected against Page Program

(PP), Page Erase (PE), Sector Erase (SE) and Block Erase (BE) commands. The Block Protect (BP4, BP3,

BP2, BP1, and BP0) bits can be written provided that the Hardware Protected mode has not been set. The

Chip Erase (CE) command is executed, only if the Block Protect (BP4, BP3, BP2, BP1and BP0) are set to

“None protected”.

SRP bits.

The Status Register Protect (SRP) bits are non-volatile Read/Write bits in the status register. The SRP bits

control the method of write protection: software protection, hardware protection, power supply lock-down or

one time programmable protection

SRP

WP#

Status Register

Description

Software Protected

The Status Register can be written to after a Write Enable

command, WEL=1.(Default)

Hardware Protected

WP#=0,the Status Register locked and can not be written

to.

Hardware Unprotected

WP#=1,the Status Register is unlocked and can be

written to after a Write Enable command, WEL=1.

P25T22L Datasheet(PDF) 21 Page - Puya Semiconductor Co., Ltd.