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ADM1041A Datasheet(PDF) 21 Page - Analog Devices |
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ADM1041A Datasheet(HTML) 21 Page - Analog Devices |
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21 / 56 page ![]() ADM1041A Rev. 0 | Page 21 of 56 CURRENT SENSING Current is typically sensed by a low value resistor in series with the positive output of the power supply, positioned just before the OrFET or diode. For high voltages (12 V and higher), this resistor is usually placed in the negative load. A pair of closely matched voltage dividers connected to Pins 2 and 3 divide the common-mode voltage down to approximately 2.0 V. The divider ratio must be the same as used in the local and remote voltage-sense circuits. Alternatively, current may be sensed by a current transformer (CT) connected to Pin 8. The ADM1041A must be configured via the SMBus to select one or the other. See Figure 13. CURRENT-TRANSFORMER INPUT The ADM1041A can also be configured to sense current by using a CT connected to Pin 8. In this case, the resistive current sense is disabled. A separate single-ended amplifier has two possible sensitivities that are selected via the SMBus. If the CT option is selected, the gain of the 1.0, 2.1 buffer that follows the gain trim stage is no longer configurable and is fixed at 1.0. The share driver amplifier has a total of 100 mV positive offset built into it. To use the device in CT mode, it is necessary to compensate for this additional 100 mV offset. This is achieved by adding in a positive offset on the CT input. This also allows any negative amplifier offsets in the CT chain to be nulled out. This offset cancellation is achieved by sourcing a current through a resistance on the ICT pin. The resistor value is 40 kΩ and so for 100 mV of offset cancellation a current of 2.5 μA is required. It is possible to fine trim this current via Register 15h, Bits 4–0, step size 170 nA. For example, 2.5 μA ≈ 15 × 170 nA; so the code for Register 15h is decimal 15 or 0Fh. Refer to the Current Transformer parameter in the Specifications table for more details. See Figure 13. CURRENT-SENSE CALIBRATION Regardless of which means is used to sense the current, the end result of the calibration process should produce the standard current share signal between Pins 20 and 23, that is, 2.0 V at 100% load, excluding any additional share signal offset that might be configured. CURRENT-LIMIT ERROR AMPLIFIER This is a low gain transconductance amplifier that takes its input from one of the calibrated current stages described previously. The amplifier requires only the output pin for loop compensation, which typically consists of a series RC network- to-common. A trimmable reference provides a wide range of adjustment for the current limit. When the current signal reaches the reference voltage, the output of the error amplifier comes out of saturation and begins to drive a controlled current source. The control threshold is nominally 1.0 V. This current flows through a resistor in series with the trimmed voltage loop signal and thereby attempts to increase the voltage signal above the 1.5 V reference for that loop. The closed voltage loop reacts by reducing the power supply’s output voltage and this results in constant current operation. See Figure 13. VREF VREF VDD SET CURRENT- LIMIT LEVEL TRANSFORMER CURRENT- SENSE CONFIGURATION CURRENT TRANSFORMER CCMP ICT CS+ CS–/FS GAIN = 10 CURRENT CURRENT LIMIT TO VOLTAGE ERROR AMP IRS/ICT SET CURRENT SHARE CURRENT- SHARE OFFSET (VSHARE, IOUT = 0) CURRENT ERROR AMP TO CURRENT- SHARE DRIVE AMPLIFIER 1.25V OCP COMPARATOR OCP SET GAIN 40k Ω REG 17h b7 OrFET SOURCE R 9R 0.5V 3 2 8 4 OrFET GATE Figure 13. Current Sense |
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