Nexperia

74LVC1G00

Single 2-input NAND gate

3. Ordering information

Table 1. Ordering information

Package

Type number

Temperature range Name

Description

Version

74LVC1G00GW

-40 °C to +125 °C

TSSOP5 plastic thin shrink small outline package; 5 leads;

body width 1.25 mm

SOT353-1

74LVC1G00GV

-40 °C to +125 °C

SC-74A

plastic surface-mounted package; 5 leads

SOT753

74LVC1G00GM

-40 °C to +125 °C

XSON6

plastic extremely thin small outline package; no leads;

6 terminals; body 1 × 1.45 × 0.5 mm

SOT886

74LVC1G00GN

-40 °C to +125 °C

XSON6

extremely thin small outline package; no leads;

6 terminals; body 0.9 × 1.0 × 0.35 mm

SOT1115

74LVC1G00GS

-40 °C to +125 °C

XSON6

extremely thin small outline package; no leads;

6 terminals; body 1.0 × 1.0 × 0.35 mm

SOT1202

74LVC1G00GX

-40 °C to +125 °C

X2SON5 plastic thermal enhanced extremely thin

small outline package; no leads; 5 terminals;

body 0.8 × 0.8 × 0.32 mm

SOT1226-3

4. Marking

Table 2. Marking codes

Type number

Marking[1]

74LVC1G00GW

VA

74LVC1G00GV

V00

74LVC1G00GM

VA

74LVC1G00GN

VA

74LVC1G00GS

VA

74LVC1G00GX

VA

[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.

5. Functional diagram

mna097

B

A

Y

2

1

4

Fig. 1. Logic symbol

mna098

2

4

&

1

Fig. 2. IEC logic symbol

mna099

B

A

Y

Fig. 3. Logic diagram

74LVC1G00

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© Nexperia B.V. 2022. All rights reserved

Product data sheet

Rev. 13 — 8 February 2022

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