Nexperia

PIMC32

50 V, 500 mA NPN/PNP Resistor-Equipped double Transistor (RET); R1 = 2.2 kΩ, R2 = 10 kΩ

5. Pinning information

Table 2. Pinning information

Pin

Symbol

Description

Simplified outline

Graphic symbol

1

GND1

GND (emitter) TR1

2

I1

input (base) TR1

3

O2

output (collector) TR2

4

GND2

GND (emitter) TR2

5

I2

input (base) TR2

6

O1

output (collector) TR1

1

3

2

4

5

6

SC-74; TSOP6 (SOT457)

O1 I2

GND2

GND1

I1 O2

R2

TR1

TR2

R1

R2

R1

aaa-007379

6. Ordering information

Table 3. Ordering information

Package

Type number

Name

Description

Version

PIMC32

SC-74; TSOP6 plastic, surface-mounted package (SC-74; TSOP6); 6

leads

SOT457

7. Marking

Table 4. Marking codes

Type number

Marking code

PIMC32

4H

8. Limiting values

Table 5. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol

Parameter

Conditions

Min

Max

Unit

Per transistor; for the PNP transistor (TR2) with negative polarity where applicable

VCBO

collector-base voltage

open emitter

-

50

V

VCEO

collector-emitter voltage open base

-

50

V

VEBO

emitter-base voltage

open collector

-

5

V

VI

input voltage

-5

12

V

IO

output current

-

500

mA

Ptot

total power dissipation

Tamb ≤ 25 °C

[1]

-

290

mW

Per device

Ptot

total power dissipation

Tamb ≤ 25 °C

[1]

-

420

mW

Tj

junction temperature

-

150

°C

Tamb

ambient temperature

-55

150

°C

Tstg

storage temperature

-65

150

°C

[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided, 35 µm copper, tin-plated and standard footprint.

PIMC32

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© Nexperia B.V. 2022. All rights reserved

Product data sheet

16 February 2022

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