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MAX2160EBG Datasheet(PDF) 21 Page - Maxim Integrated Products |
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MAX2160EBG Datasheet(HTML) 21 Page - Maxim Integrated Products |
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21 / 25 page ![]() ISDB-T Single-Segment Low-IF Tuners ______________________________________________________________________________________ 21 Layout Considerations The EV kit serves as a guide for PC board layout. Keep RF signal lines as short as possible to minimize losses and radiation. Use controlled impedance on all high- frequency traces. For proper operation of the TQFN package, the exposed paddle must be soldered evenly to the board’s ground plane. Use abundant vias beneath the exposed paddle for maximum heat dissi- pation. Use abundant ground vias between RF traces to minimize undesired coupling. Bypass each VCC pin to ground with a 100pF capacitor placed as close to the pin as possible. In addition, the ground returns for the VCO, VTUNE, and charge pump require special layout consideration. The VCOBYP capacitor (C37) and the VCCVCO bypass capacitor (C19) ground returns must be routed back to the GNDVCO pin and then connected to the overall ground plane at that point (GNDVCO). All loop filter component grounds (C27–C30) and the VCCCP bypass capacitor (C17) ground must all be routed together back to the GNDCP pin. GNDTUNE must also be routed back to the GNDCP pin along with all other grounds from the PLL loop filter. The GNDCP pin must then be connected to the overall ground plane. Figure 4 shows a schematic drawing of the required layout connections. Refer to the MAX2160 evaluation kit for a recommended board layout. Table 16. Typical Supply Current Fluctuations for Nondefault Register Settings MODE BIT CHANGE TYPICAL ICC TYPICAL ∆ICC FROM NOMINAL Default register settings 46.5mA — QOFF = 1 (Q channel off) — -3.3mA BBL[1:0] = 00 (lower linearity) — -2mA BBL[1:0] = 01 (nominal linearity) — -1mA BBL[1:0] = 11 (high linearity) — +1mA MOD = 1 (7dB baseband gain step enabled) — +0.3mA EPD = 1 (power detector enabled) — +1mA EPB = 0 (charge-pump prebias disabled) — +5.1mA Receive XD[4:0] = 00000 (XTALOUT buffer disabled) — -40µA Shutdown SHDN = GND 1µA — Standby STBY = 1 2.2mA — Power-Down PWDN = 1 13.5µA — VCC VCC 34 33 32 38 37 36 35 40 39 C17 C28 C27 C29 C30 R20 R21 R22 C19 C37 ROUTE GNDTUNE, C17, AND ALL LOOP FILTER COMPONENT GROUNDS TO GNDCP. CONNECT GNDCP TO THE BOARD'S GROUND PLANE. ROUTE C19 AND C37 TO GNDVCO. CONNECT GNDVCO TO THE BOARD'S GROUND PLANE. Figure 4. Ground Return Layout Connections for the VCO, Charge Pump, and VTUNE |
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