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M16C/62P Datasheet(PDF) 47 Page - Renesas Technology Corp |
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M16C/62P Datasheet(HTML) 47 Page - Renesas Technology Corp |
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47 / 87 page  M16C/62 Group (M16C/62P, M16C/62PT) 5. Electrical Characteristics (M16C/62P) VCC1 = VCC2 = 5V 4 8 f o 3 0 0 2 , 7 0 . v o N 0 1 . 2 . v e R page 47 BCLK CSi td(BCLK-CS) 25ns.max ADi 25ns.max ALE 25ns.max -4ns.min RD 25ns.max th(BCLK-RD) 0ns.min th(BCLK-AD) 4ns.min th(BCLK-CS) 4ns.min Hi-Z DBi th(RD-DB) 0ns.min 0ns.min th(RD-AD) BHE tcyc Read timing td(BCLK-AD) td(BCLK-ALE) th(BCLK-ALE) tsu(DB-RD) td(BCLK-RD) 40ns.min tac1(RD-DB) Memory Expansion Mode, Microprocessor Mode (For setting with no wait) Measuring conditions • VCC1=VCC2=5V • Input timing voltage : VIL=0.8V, VIH=2.0V • Output timing voltage : VOL=0.4V, VOH=2.4V WR,WRL, WRH 25ns.max th(BCLK-WR) 0ns.min BCLK CSi td(BCLK-CS) 25ns.max ADi td(BCLK-AD) 25ns.max ALE 25ns.max td(BCLK-ALE) th(BCLK-ALE) -4ns.min th(BCLK-AD) 4ns.min th(BCLK-CS) 4ns.min tcyc th(WR-AD) BHE td(BCLK-DB) 40ns.max 4ns.min th(BCLK-DB) td(DB-WR) (0.5 X tcyc-40)ns.min th(WR-DB) DBi Write timing td(BCLK-WR) Hi-Z (0.5 X tcyc-45)ns.max tcyc= 1 f(BCLK) (0.5 X tcyc-10)ns.min (0.5 X tcyc-10)ns.min Figure 5.5 Timing Diagram (4) |
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