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TMPR4925XB Datasheet(PDF) 7 Page - Toshiba Semiconductor |
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TMPR4925XB Datasheet(HTML) 7 Page - Toshiba Semiconductor |
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7 / 32 page ![]() INTEGRATED CIRCUIT TOSHIBA RISC PROCESSOR TMPR4925XB TENTATIVE EJC-TMPR4925XB-7 26/Dec/01 Rev 0.1 TOSHIBA CORPORATION n Timers / Counters Controller ( TMR ) The TX4925 contains 3-channel timer / counters. • 3-channel 32-bit up-counter • Supports three modes : interval timer mode, pulse generator mode, and watchdog timer mode • 2 timer output pins • 1 count clock input pin n Parallel I/O Ports ( PIO ) The TX4925 contains 32-bit parallel I/O ports • Independent selection of direction of pins and output port type ( totem-pole or open-drain outputs ) on a per bit basis. (PIO[4,2,0] are input-only pins.) n AC-link controller ( ACLC ) The TX4925 contains an AC-link controller, which can be operated using any audio and / or modem CODECs described in Audio CODEC’97 Revision 2.1 ( AC’97 ). • Supports up to two CODECs • Supports recording and playback for right and left 16-bit PCM channels • Supports playback for 16-bit surround, center, and LFE channels • Supports audio recording and layback at variable rate • Supports Line1 and GPIO slots for modem CODEC • Supports AC-link low power mode, wakeup, and warm reset • Supports input / output of sample data by DMA transfer |
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