VSP9402A datasheet(21/126 Pages) MICRONAS

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DATA SHEET

VSP 94x2A

Micronas

Aug. 16, 2004; 6251-552-1DS

2.4. Output Processing

2.4.1. Horizontal Postscaler

After main memory, the display processing is per-

formed using a different clock. In this way a decoupling

of input and output clocks is achieved. The conversion

to the display clock is done by an interpolation filter.

This can be used for horizontal expansion in the range

of 1...4 in steps of 2 pixels (HSCPOSC). Due to

increased clock frequency in the backend part, the

realized horizontal scaling factor depends on backend

clock frequency. Usually (36 MHz operation), the hori-

zontal expansion factors result as 0.75...16. This

ensures that the factor 0.75 gives no loss of resolution

(to show a 4:3 picture on a 16:9 tube). When using

DS656 output, neither horizontal compression nor hor-

izontal panorama is possible due to 27 MHz clock.

Because of the nonlinear characteristic and integer

number of pixel, sometimes different HSCPOSC val-

ues result in the same decimation factors.

Fig. 2–29: Expansion Factor of Horizontal Postscaler

Dependent on HSCPOSC

2.4.1.1. Panorama Mode

The picture can be geometrically distorted in horizontal

direction for an improved impression in the case of

expansions of 4:3 pictures to a 16:9 ratio tube. It is

enabled by HPANON. The idea behind this panorama

mode is to keep the middle part of the picture in a 4:3

ratio and to stretch the left and the right to fill the entire

width of the 16:9 screen. For the adjustment of the

expansion process, the picture is divided into 5 seg-

ments. For each of these segments the increment

value for the expansion factor can be defined sepa-

rately. Each end of a segment can be defined individu-

ally in a granularity of two output pixels. For every seg-

ment

increment

value

can

defined

(HINC0...HINC4) which indicates the amount of deci-

mation/expansion. One LSB is equivalent to an offset

of 0.125 to HSCPRESC per double pixel. This means

that with HINC, HSCPRESC is altered in the range

from −32...31.875 per double pixel. The segments are

distributed among the maximum number of pixels,

which is adjusted by PPLOP. The first four segments

are defined by (HSEG1...HSEG4). The last one goes

from HSEG4 to PPLOP.

Fig. 2–30: Visualization of Panorama Segments

Table 2–8: Horizontal expansion factors

HSCPOSC

Horizontal

Filter

Expansion

Overall Expansion

CLKB36=

27 MHz

CLKB36=

36 MHz

1024 (min.)

3072

1.33

4095

0.75

1024

4095

1000

2000

3000

4000

0.5

1.5

2.5

3.5

Horizontal Postscaler

HSCPOSC(I²C)

HSCPOSC

(I²C)

output

pixels

HSEG1

max.

INC_VAL

pixels

31.875

-32

HINC0

HSCALE

output

HSEG2

HSEG3

HSEG4

HINC1

HINC2

HINC3

HINC4

HSEG1

max.

HSEG2

HSEG3

HSEG4

1024

4095

3072

compression

expansion

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