15

µPD66P04B

Data Sheet U13596EJ2V1DS00

AC Characteristics (TA = –40 to +85

°C, VDD = 2.2 to 3.6 V)

Parameter

Symbol

Test Conditions

MIN.

TYP.

MAX.

Unit

Instruction execution time tCY

15.9

27

µs

Note 1

7.9

27

µs

KI, S0, S1 high-level width

tH

10

µs

When canceling standby mode

HALT mode

10

µs

STOP mode

Note 2

µs

RESET low-level width

tRSL

10

µs

Notes 1. When using at fOSC = 500 kHz or higher, it is necessary to design the application circuit so that the

RESET pin goes low when the supply voltage is less than 2.2 V.

2. 10 + 260/fOSC

Remark tCY = 8/fOSC (fOSC: System clock oscillator frequency)

POC CircuitNote 1 (TA = –20 to +70

°C)

Parameter

Symbol

Test Conditions

MIN.

TYP.

MAX.

Unit

POC-detected voltageNote 2

VPOC

1.8

2.0

2.2

V

POC circuit current

IPOC

1.2

1.5

µA

Notes 1. Operates effectively under the conditions of fOSC = 300 to 500 kHz.

2. Refers to the voltage with which the POC circuit cancels an internal reset. If VPOC < VDD, the internal

reset is canceled.

From the time of VPOC

≥ VDD until the internal reset takes effect, lag of up to 1 ms occurs. When the

period of VPOC

≥ VDD lasts less than 1 ms, the internal reset may not take effect.

System Clock Oscillator Characteristics (TA = –40 to +85

°C, VDD = 2.2 to 3.6 V)

Parameter

Symbol

Test Conditions

MIN.

TYP.

MAX.

Unit

Oscillator frequency

fOSC

300

455

500

kHz

Note

300

455

1000

kHz

Note When using at fOSC = 500 kHz or higher, it is necessary to design the application circuit so that the RESET

pin goes low when the supply voltage is less than 2.2 V.

Recommended Oscillator Constant (TA = –40 to +85

°C, VDD = 2.2 to 3.6 V)

Parameter

Symbol

Test Conditions

MIN.

TYP.

MAX.

Unit

Capacity of oscillation

C

22

27

33

pF

capacitor

Oscillation resistance

R

47

k

Ω

An external circuit example

OSCIN

OSCOUT

C

R