UPD67B datasheet(13/73 Pages) RENESAS

13 / 73 page

µPD67B, 68B

Data Sheet U16792EJ1V1DS

Figure 2-4. Data Memory Configuration

2.6 Data Pointer (DP): 12 Bits

The ROM data table can be referenced by setting the ROM address in the data pointer to call the ROM contents.

The lower 8 bits of the ROM address are specified by R0 of the data memory; and the higher 4 bits by bits 4

to 7 of the P3 register (CR0).

After reset, the pointer contents become 000H.

Figure 2-5. Data Pointer Configuration

Note Set DP10 and DP11 to 0 in the case of the

µPD67B and set DP10 to 0 in the case of the µPD68B.

2.7 Accumulator (A): 4 Bits

The accumulator, which refers to a register consisting of 4 bits, plays a leading role in performing various

operations.

After reset, the accumulator contents are left undefined.

Figure 2-6. Accumulator Configuration

R10

R00

R11

R01

R12

R02

R13

R03

R14

R04

R15

R05

R16

R06

R17

R07

R18

R08

R19

R09

R1A

R0A

R1B

R0B

R1C

R0C

R1D

R0D

R1E

R0E

R1F

R0F

→DP (refer to 2.6 Data Pointer (DP))

→ASR (refer to 2.3 Address Stack Register (ASR (RF)))

R1n (higher 4 bits) R0n (lower 4 bits)

Page 0

R00

DP9

DP8

DP7

DP6

DP5

DP4

DP3

DP2

DP1

DP0

R10

P3 register

DP10

Note

DP11

Note

UPD67B Datasheet(PDF) 13 Page - Renesas Technology Corp

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