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UPD78C14 Datasheet(PDF) 39 Page - Renesas Technology Corp |
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UPD78C14 Datasheet(HTML) 39 Page - Renesas Technology Corp |
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39 / 54 page ![]() µPD78C14(A) 37 tCYC tAD tLL tLA tLDR tRDH tRL tRR tRD tAFR tLR tAR tAL tLM tLI tML tIL X1 PF7-0 PD7-0 ALE RD MODE1 (M1) Note 1 MODE0 (IO/M) Note 2 address (high-order) address (low-order) read data Timing Waveform Read Operation Write Operation Notes 1. M1 signal is output to MODE1 pin at first OP code fetch cycle if MODE1 pin is pulled up. 2. IO/M signal is output to MODE0 pin at sr to sr2 register read cycle if MODE0 pin is pulled up. 3. IO/M signal is output to MODE0 pin at sr to sr2 register write cycle if MODE0 pin is pulled up. tLL tLA tDW tWDH tWL tWW tWD tLW tAW tAL tLI tIL X1 PF7-0 PD7-0 ALE WR MODE0 (IO/M) Note 3 address (high-order) write data tLDW address (low-order) |
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