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UPD72012 Datasheet(PDF) 27 Page - Renesas Technology Corp

Part # UPD72012
Description  MOS INTEGRATED CIRCUIT
PDF  38 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

UPD72012 Datasheet(HTML) 27 Page - Renesas Technology Corp

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Data Sheet S13918EJ3V0DS
25
µPD72012
AC Characteristics (VDD = 3.3 V +0.3 V, TA = 0 to +70
°°°°C)
(1) Full-speed output driver characteristics
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
Output rise time (FS)
Output fall time (FS)
tFR, tFF
UD0, UD1
CL = 50 pF, TA = 25
°C,
10% to 90%
420
ns
Crossover output voltage
VCRS
1.3
2.0
V
Driver output resistance
ZDRV
28
44
Ω
Full-speed data rate
tFDRATE
12Mbps
±0.25%
11.97
12.03
Mbps
tDJ1
Continuous transition
±3.5
ns
Differential driver jitter (FS)
tDJ2
Pair transition
±4.0
ns
Source jitter on SE0 transition from
differential transition (FS)
tFDEOP
–2
+5
ns
tJR1
Continuous transition
±18.5
ns
Receiver jitter (FS)
tJR2
Pair transition
±9ns
One-way propagation delay
tFPROP
26
ns
EOP source SE0 interval
tFEOPT
160
175
ns
EOP receiver SE0 interval
tFEOPR
Accept as effective EOP.
82
ns
SE0 time interval on differential
transition
tFST
14
ns
(2) HUB repeater characteristics (Full-speed)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
Output rise time (LS)
Output fall time (LS)
tr, tf
D10 to D50, D11 to D51
CL = 50 pF, TA = 25
°C,
10% to 90%
420
ns
tHDD1
With cable
70
ns
Differential data delay (LS)
tHDD2
Without cable
44
ns
tHDJ1
Continuous transition
±3
ns
Differential driver jitter (LS)
tHDJ2
Pair transition
±1
ns
Data bit length distortion after SOP
(LS)
tFSOP
+5
ns
HUB EOP delay for tHDD1
tFEOPD
015
ns
EOP output width skew (LS)
tFHESK
±15
ns



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