PHT4NQ10LT

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© NXP B.V. 2011. All rights reserved.

Product data sheet

Rev. 2 — 28 October 2011

6 of 13

NXP Semiconductors

PHT4NQ10LT

N-channel TrenchMOS logic level FET

Tj = 25 °C; VDS = 5 V

Fig 8.

Sub-threshold drain current as a function of

gate-source voltage

Fig 9.

Gate-source threshold voltage as a function of

junction temperature

Fig 10. Drain-source on-state resistance as a function

of drain current; typical values

Fig 11. Normalized drain-source on-state resistance

factor as a function of junction temperature

03aa36

10

-6

10

-5

10

-4

10

-3

10

-2

10

-1

0123

VGS (V)

ID

(A)

max

typ

min

03aa33

0

0.5

1

1.5

2

2.5

-60

0

60

120

180

Tj (

°C)

VGS(th)

(V)

max

typ

min

03ac86

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1

01

234

5678

9

10

ID (A)

RDSon

(Ω)

Tj = 25

°C

2V 2.2V

2.4V

2.6V

2.8V

3V

VGS = 5V

03aa29

0

1

2

3

-60

0

60

120

180

Tj (

°C)

a