ST7FL15F1MATRE datasheet(35/138 Pages) STMICROELECTRONICS

35 / 138 page

ST7L15, ST7L19

35/138

9 POWER SAVING MODES

9.1 INTRODUCTION

To give a large measure of flexibility to the applica-

tion in terms of power consumption, five main pow-

er saving modes are implemented in the ST7 (see

Figure 19):

■ Slow

■ Wait (and Slow-Wait)

■ Active Halt

■ Auto Wake-Up From Halt (AWUFH)

■ Halt

After a RESET, the normal operating mode is se-

lected by default (RUN mode). This mode drives

the device (CPU and embedded peripherals) by

means of a master clock which is based on the

main oscillator frequency divided or multiplied by 2

(fOSC2).

From RUN mode, the different power saving

modes can be selected by setting the relevant reg-

ister bits or by calling the specific ST7 software in-

struction whose action depends on the oscillator

status.

Figure 19. Power Saving Mode Transitions

9.2 SLOW MODE

This mode has two targets:

– To reduce power consumption by decreasing the

internal clock in the device,

– To adapt the internal clock frequency (fCPU) to

the available supply voltage.

SLOW mode is controlled by the SMS bit in the

MCCSR register which enables or disables SLOW

mode.

In this mode, the oscillator frequency is divided by

32. The CPU and peripherals are clocked at this

lower frequency.

Note: SLOW-WAIT mode is activated when enter-

ing WAIT mode while the device is already in

SLOW mode.

Figure 20. SLOW Mode Clock Transition

POWER CONSUMPTION

WAIT

SLOW

RUN

ACTIVE HALT

High

Low

SLOW WAIT

AUTO WAKE-UP FROM HALT

HALT

SMS

fCPU

NORMAL RUN MODE

REQUEST

fOSC

fOSC/32

fOSC

ST7FL15F1MATRE Datasheet(PDF) 35 Page - STMicroelectronics

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