LP3963_06 datasheet(14/17 Pages) NSC

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Application Hints (Continued)

SHUTDOWN OPERATION

A CMOS Logic level signal at the shutdown ( SD) pin will

turn-off the regulator. Pin SD must be actively terminated

through a 10k

Ω pull-up resistor for a proper operation. If this

pin is driven from a source that actively pulls high and low

(such as a CMOS rail to rail comparator), the pull-up resistor

is not required. This pin must be tied to Vin if not used.

DROPOUT VOLTAGE

The dropout voltage of a regulator is defined as the minimum

input-to-output differential required to stay within 2% of the

nominal output voltage. The LP3963/LP3966 use an internal

MOSFET with an Rds(on) of 240m

Ω (typically). For CMOS

LDOs, the dropout voltage is the product of the load current

and the Rds(on) of the internal MOSFET.

REVERSE CURRENT PATH

The internal MOSFET in LP3963 and LP3966 has an inher-

ent parasitic diode. During normal operation, the input volt-

age is higher than the output voltage and the parasitic diode

is reverse biased. However, if the output is pulled above the

input in an application, then current flows from the output to

the input as the parasitic diode gets forward biased. The

output can be pulled above the input as long as the current

in the parasitic diode is limited to 200mA continuous and 1A

peak.

POWER DISSIPATION/HEATSINKING

LP3963 and LP3966 can deliver a continuous current of 3A

over the full operating temperature range. A heatsink may be

required depending on the maximum power dissipation and

maximum ambient temperature of the application. Under all

possible conditions, the junction temperature must be within

the range specified under operating conditions. The total

power dissipation of the device is given by:

D =(VIN−VOUT)IOUT+(VIN)IGND

where I

GND is the operating ground current of the device

(specified under Electrical Characteristics).

The maximum allowable temperature rise (T

Rmax) depends

on the maximum ambient temperature (T

Amax) of the appli-

cation, and the maximum allowable junction temperature

Jmax):

Rmax =TJmax−TAmax

The maximum allowable value for junction to ambient Ther-

mal Resistance,

JA, can be calculated using the formula:

JA =TRmax /PD

LP3963 and LP3966 are available in TO-220 and TO-263

packages. The thermal resistance depends on amount of

copper area or heat sink, and on air flow. If the maximum

allowable value of

JA calculated above is

≥ 60 ˚C/W for

TO-220 package and

≥ 60 ˚C/W for TO-263 package no

heatsink is needed since the package can dissipate enough

heat to satisfy these requirements. If the value for allowable

JA falls below these limits, a heat sink is required.

HEATSINKING TO-220 PACKAGE

The thermal resistance of a TO220 package can be reduced

by attaching it to a heat sink or a copper plane on a PC

board. If a copper plane is to be used, the values of

JA will

be same as shown in next section for TO263 package.

The heatsink to be used in the application should have a

heatsink to ambient thermal resistance,

≤θ

JA −

CH −

JC.

In this equation,

CH is the thermal resistance from the case

to the surface of the heat sink and

JC is the thermal resis-

tance from the junction to the surface of the case.

JC is

about 3˚C/W for a TO220 package. The value for

CH de-

pends on method of attachment, insulator, etc.

CH varies

between 1.5˚C/W to 2.5˚C/W. If the exact value is unknown,

2˚C/W can be assumed.

10126708

FIGURE 2. Improving remote load regulation using LP3966

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