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UPD780921 Datasheet(PDF) 16 Page - Renesas Technology Corp |
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UPD780921 Datasheet(HTML) 16 Page - Renesas Technology Corp |
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16 / 40 page ![]() 16 µPD780921, 780922, 780923, 780924 5.2 CLOCK GENERATOR A system clock generator is incorporated. The instruction exection time can be changed. • 0.24 µs/0.48 µs/0.96 µs/1.9 µs/3.8 µs (@ 8.38-MHz operation with system clock) Figure 5-1. Clock Generator Block Diagram Systen Clock Oscillator Prescaler Prescaler Clock to Peripheral Hardware Standby Control Circuit Wait Control Circuit CPU Clock (fCPU) fX 2 fX 2 2 fX 2 3 fX 2 4 STOP fX X1 X2 |
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